{"title":"A digital Cartesian feedback path design for 2.4GHz ISM band standards","authors":"J. Zeleny, P. Wurm, P. Vincent, A. Kaiser","doi":"10.1109/ICECS.2009.5410877","DOIUrl":"https://doi.org/10.1109/ICECS.2009.5410877","url":null,"abstract":"A digital radiofrequency (RF) transmitter (TX) architecture for software defined radio (SDR) is proposed in this paper. Nowadays the tendency is to integrate many telecommunication standards within a unique circuit. This leads to consider reconfigurable transmission architectures which contain a minimum of analogue components. To address the non linearity issue posed by the power amplifier (PA), an adaptive baseband digital predistortion mechanism was favored for its stability and software reconfigurability. The subsequent predistortion algorithm collects the data from the PA trough a dedicated feedback path. In the State-of-the-Art proposed feedback paths are not reconfigurable. Either they contain analogue filters. In proposed feedback path, the filtering is performed by charge sampling at the entrance of analog-to-digital converter (ADC). We present the analysis and model of the proposed feedback path. The scaling of ADC resolution and bandwidth for the most stringent standard in ISM 2.4 GHz band is reported.","PeriodicalId":343974,"journal":{"name":"2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009)","volume":"07 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127238787","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
K. Grandez, P. Bustamante, G. Solas, Iñaki Gurutzeaga, A. Garcia-Alonso
{"title":"Wearable wireless sensor for the gait monitorization of Parkinsonian patients","authors":"K. Grandez, P. Bustamante, G. Solas, Iñaki Gurutzeaga, A. Garcia-Alonso","doi":"10.1109/ICECS.2009.5410974","DOIUrl":"https://doi.org/10.1109/ICECS.2009.5410974","url":null,"abstract":"The number of elderly people in European population is becoming higher year after year, thus, increasing the number of people affected by neurodegenerative diseases. The early diagnosis and treatment of these patients is a critical aspect yet not covered in depth. In this paper we propose a novel system for the monitorization of gait of patients affected by Parkinson disease (PD). Force Sensitive Resistors (FSR) are used, embedding them in an insole, which allows the capture and analysis of the gait over long periods of time and while the patient interacts with a natural (non-controlled) environments. The medical doctors are able to visualize and analyze the signals using a PC application, in order to obtain conclusions. This work is being developed in the framework of PERFORM1 project, which is financed by the European Commission and with the participation of the University Hospital of Navarra.","PeriodicalId":343974,"journal":{"name":"2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009)","volume":"55 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127245527","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Extended design of equiripple comb FIR filters","authors":"P. Zahradnik, M. Vlcek","doi":"10.1109/ICECS.2009.5410764","DOIUrl":"https://doi.org/10.1109/ICECS.2009.5410764","url":null,"abstract":"An extended analytical design of digital equiripple comb FIR filters is presented. The comb FIR filters are optimal in Chebyshev sense. The classification of four types of optimal equiripple comb FIR filters is introduced. Starting from the filter specification the impulse response is evaluated by an efficient analytical procedure. The degree equation is presented. The proposed design method outperforms the standard design procedures in terms of speed and robustness.","PeriodicalId":343974,"journal":{"name":"2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009)","volume":"98 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133766916","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Fundamental logics based on two phase clocked adiabatic static CMOS logic","authors":"Nazrul Anuar, Yasuhiro Takahashi, T. Sekine","doi":"10.1109/ICECS.2009.5410880","DOIUrl":"https://doi.org/10.1109/ICECS.2009.5410880","url":null,"abstract":"This paper demonstrates some fundamental logic gates employing two phase clocked adiabatic static CMOS logic (2PASCL) circuit techniques. We design and simulate NOT, NAND, NOR, and XOR logic gates on the basis of the 2PASCL topology using SPICE implemented using 0.18 µm CTX CMOS technology. For NOT circuit, analytical and simulation values are compared. From the simulation results, we find that 2PASCL inverter logic can save up to 97% of dissipated energy as compared to that with a static CMOS logic at transition frequencies of 10 to 100 MHz. Further, the power dissipation is the lowest when compared with other proposed simple adiabatic logic inverters. 2PASCL also achieves the highest fan-out performance. The results indicate that 2PASCL technology can be advantageously applied to low power digital devices operated at low frequencies, such as radio-frequency identifications (RFIDs), smart cards, and sensors.","PeriodicalId":343974,"journal":{"name":"2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009)","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115534910","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Mathieu Périn, Olivier Aymard, S. Darfeuille, P. Gamand, C. Berland
{"title":"Low-power digitally-controlled variable gain LNA with high isolation for sub-GHz ISM bands","authors":"Mathieu Périn, Olivier Aymard, S. Darfeuille, P. Gamand, C. Berland","doi":"10.1109/ICECS.2009.5410856","DOIUrl":"https://doi.org/10.1109/ICECS.2009.5410856","url":null,"abstract":"A low-power digitally-controlled variable gain low noise amplifier is implemented in a 40-GHz fT 0.25 ¿m BiCMOS process. Wideband input matching independent of the variable gain, as well as high reverse isolation are achieved thanks to a partial feedback technique. The variable gain is based on a resistor-chain gain-control technique, leading to fine gain steps and constant output impedance. It covers the sub-GHz ISM bands for automotive applications such as Remote Keyless Entry. This LNA is designed with 15 gain steps of 1 dB. The simulated results for the maximum gain show a Transducer Power Gain of 16.5 dB, a Noise Figure of 2.4 dB and respective input and output IP3 of -12.1 dBm and +4.5 dBm, while only drawing 1.45 mA from a 2.7 V power supply. The measurement results are slightly degraded because of wire-bonding couplings in the package.","PeriodicalId":343974,"journal":{"name":"2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009)","volume":"44 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124125404","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A novel hybrid Photovoltaic/Wave energy utilization system for island electricity","authors":"A. Sharaf, M. El-Sayed","doi":"10.1109/ICECS.2009.5410867","DOIUrl":"https://doi.org/10.1109/ICECS.2009.5410867","url":null,"abstract":"This paper presents the efficient utilization of hybrid Photovoltaic/Wave energy system for desalination water pumping and supplying the local AC and DC loads. The novel hybrid system comprises eight key parts. The PV Array and Wave Energy permanent magnet linear generator (PMLG) as energy sources, Novel AC side Modulated Power Filter Compensator MPFC, AC-DC converter, Novel DC side Green Plug Power Filter GPF, DC Permanent Magnet Motor for water pumping station PMDC, DC local load, Interfacing DC-AC Inverter to the public grid, Inverter controller and AC load for supplying the additional electric demand. The proposed hybrid system with all subsystems has been digitally simulated using the Matlab Simulink/Sim-Power software environment. In addition, the novel dynamic error driven control system is also simulated and the performance and dynamic characteristics of the controllers is tested for PMDC Motor torque variation, changing variables of renewable sources and load excursions. The dynamic performance of the unified green Wave Energy utilization system is assessed using the coordinated dynamic error driven regulators.","PeriodicalId":343974,"journal":{"name":"2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124216030","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
J. Long, Yi Zhao, W. L. Chan, K. Kwok, Yanyu Jin, Dixian Zhao
{"title":"Silicon millimeter-wave technologies and circuits","authors":"J. Long, Yi Zhao, W. L. Chan, K. Kwok, Yanyu Jin, Dixian Zhao","doi":"10.1109/ICECS.2009.5410816","DOIUrl":"https://doi.org/10.1109/ICECS.2009.5410816","url":null,"abstract":"Silicon technologies are enabling ICs capable of operating at millimeter-wave (mm-wave) frequencies, with advantages in design complexity, functionality and cost compared to III-Vs. The potential for application of deep submicron SiGe-BiCMOS and CMOS-SOI technologies in mm-wave systems is surveyed in this paper. Progress in mm-wave silicon IC development for Gbit/s data rate wireless communication is highlighted with emphasis on recently reported innovations and developments from the authors' own work.","PeriodicalId":343974,"journal":{"name":"2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009)","volume":"395 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114917950","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A new low voltage bandgap reference topology","authors":"M. Isikhan, T. Reich, A. Richter, E. Hennig","doi":"10.1109/ICECS.2009.5410966","DOIUrl":"https://doi.org/10.1109/ICECS.2009.5410966","url":null,"abstract":"A new low voltage bandgap voltage reference circuit topology is proposed and analyzed and simulation results are presented in this paper. The conventional topologies for low voltage bandgap reference applications require an Op-Amp as the feedback amplifier. The new topology utilizes a self-biasing transresistance amplifier structure with a reduced current consumption for this purpose. Two circuit versions with the proposed topology are designed with a 0.18 µm standard CMOS technology for minimum supply voltages of 1.2 V and 1.5 V respectively. Simulation results prove that for a bandgap reference voltage (VBG) of 823 mV and temperature range from −40 °C to 125 °C; dc PSRR of 71 dB, maximum Temperature Coefficient of 12.5 ppm/K and current consumption of 33 µA are obtained.","PeriodicalId":343974,"journal":{"name":"2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009)","volume":"128 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115097065","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A new scheme for preamble detection and frequency acquisition in OFDM systems","authors":"L. N. Atallah, M. Siala","doi":"10.1109/ICECS.2009.5410837","DOIUrl":"https://doi.org/10.1109/ICECS.2009.5410837","url":null,"abstract":"In this contribution, we propose a novel scheme for time and frequency synchronization in OFDM systems. A differential modulation is indeed used to design two training symbols with appropriate properties used as a preamble for the detection of the frame start and for the recovery of the integral carrier frequency offset. The new scheme is compared to the well known algorithm of Cox and Schmidl, also using two training symbols, and found to outperform it especially in timing acquisition for both AWGN and Rayleigh channels. As a byproduct, an estimator for the channel power profile is obtained. All the derived estimators performance depend on the choice of the symbols involved in training. We here discuss the properties for optimal performance and compare the results for a set of Gold, Kasami and Zadoff-Chu sequences.","PeriodicalId":343974,"journal":{"name":"2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009)","volume":"7 22","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120841224","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Estimation of energy performance in computing platforms","authors":"H. Zarrabi, A. Al-Khalili, Y. Savaria","doi":"10.1109/ICECS.2009.5410772","DOIUrl":"https://doi.org/10.1109/ICECS.2009.5410772","url":null,"abstract":"System-level estimation of speed and energy performance is a key step in design space exploration of low-energy and high-performance VLSI systems. While low-level simulation-based analysis can be too time-consuming to obtain performance elements, system-level models that can quickly and accurately estimate these elements are very valuable. In this work, models for energy performance estimation of computing platforms are proposed. The proposed energy performance models are inspired by Amdahl's law. The models consider platform models based on the support of power gating. Analytical results show that the upper-bound of energy performance, according to the application profile is the “resolute” (that cannot be enhanced) segment of the (embedded) software application. This is a similar concern to the one seen for “net acceleration” (the speed performance) being bounded by the “sequential” segment, according to Amdahl's law. Experimental results demonstrate that large improvements in energy performance may be obtained using power gating for both data and control dominated classes of applications (2 and 12 folds respectively). The results also demonstrate an average error of 22% between the proposed system-level models and true experimental results for three classes of applications.","PeriodicalId":343974,"journal":{"name":"2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009)","volume":"39 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123479149","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}