发布求助
文献互助 智能选刊 最新文献

2019 IEEE 49th International Symposium on Multiple-Valued Logic (ISMVL)最新文献

筛选
英文 中文
On a Minimization of Variables to Represent Sparse Multi-Valued Input Decision Functions 稀疏多值输入决策函数的最小变量表示
2019 IEEE 49th International Symposium on Multiple-Valued Logic (ISMVL) Pub Date : 2019-05-21 DOI: 10.1109/ISMVL.2019.00039
Tsutomu Sasao
{"title":"On a Minimization of Variables to Represent Sparse Multi-Valued Input Decision Functions","authors":"Tsutomu Sasao","doi":"10.1109/ISMVL.2019.00039","DOIUrl":"https://doi.org/10.1109/ISMVL.2019.00039","url":null,"abstract":"A multiple-valued input decision function is a mapping <tex>$f:P^{mathrm{n}}rightarrow{0,1}$</tex>, where <tex>$P={0,1, ldots, p-1}$</tex>. This paper considers the learning of such a function. That is, given the TRUE-set <tex>$Tsubseteq P^{n}$</tex> and the FALSE-set <tex>$Fsubseteq P^{n}$</tex>, obtain a function <tex>$f$</tex> such that <tex>$f(vec{a})=1$</tex> for any <tex>$vec{a}in T$</tex>, and <tex>$f(vec{b})=0$</tex> for any <tex>$vec{b}in F$</tex>. We show a method to find a function such that <tex>$f$</tex> depends on the least number of variables. Applications of such functions include detection of poisonous mushrooms, hepatitis and breast cancer.","PeriodicalId":329986,"journal":{"name":"2019 IEEE 49th International Symposium on Multiple-Valued Logic (ISMVL)","volume":"78 ","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120968615","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Demonstration of ternary devices and circuits using dual channel graphene barristors 使用双通道石墨烯电阻器的三元器件和电路演示
2019 IEEE 49th International Symposium on Multiple-Valued Logic (ISMVL) Pub Date : 2019-05-21 DOI: 10.1109/ISMVL.2019.00013
So-Young Kim, S. Heo, Kiyung Kim, M. Son, Seung-Mo Kim, Ho-In Lee, Yongsu Lee, H. Hwang, Moon-Ho, B. Lee
{"title":"Demonstration of ternary devices and circuits using dual channel graphene barristors","authors":"So-Young Kim, S. Heo, Kiyung Kim, M. Son, Seung-Mo Kim, Ho-In Lee, Yongsu Lee, H. Hwang, Moon-Ho, B. Lee","doi":"10.1109/ISMVL.2019.00013","DOIUrl":"https://doi.org/10.1109/ISMVL.2019.00013","url":null,"abstract":"Graphene barristors with two parallel connected n-type and undoped graphene channels are used to build a ternary logic switch. Three distinctly separated out current levels are successfully demonstrated and the experimental device parameters obtained from the graphene barristor based ternary switch are used to model the ternary circuit modules. Well-behaving standard ternary inverter, NMIN, NMAX, and ternary comparator have been obtained, confirming the feasibility of large scale integration of ternary logic devices.","PeriodicalId":329986,"journal":{"name":"2019 IEEE 49th International Symposium on Multiple-Valued Logic (ISMVL)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117039580","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Maximally Asymmetric Multiple-Valued Functions 极大非对称多值函数
2019 IEEE 49th International Symposium on Multiple-Valued Logic (ISMVL) Pub Date : 2019-05-21 DOI: 10.1109/ISMVL.2019.00040
J. T. Butler, Tsutomu Sasao
{"title":"Maximally Asymmetric Multiple-Valued Functions","authors":"J. T. Butler, Tsutomu Sasao","doi":"10.1109/ISMVL.2019.00040","DOIUrl":"https://doi.org/10.1109/ISMVL.2019.00040","url":null,"abstract":"The asymmetry of a function <tex>$f(x_{1}, x_{2}, ldots, x_{n})$</tex> is the fewest elements of the range of <tex>$f$</tex> that must be changed so that <tex>$f$</tex> becomes a symmetric function. The functions with maximal asymmetry for the case of r-valued n-variable functions have been characterized and counted for <tex>$r=2$</tex> in two previous papers. In this paper, we extend these results to <tex>$r > 2$</tex>. We do this for two types of symmetry, functions whose value is unchanged by 1) any permutation of the variable labels and by 2) any permutation of variable labels and variable values. We also derive the maximum possible asymmetry. We show that, as <tex>$nrightarrowinfty$</tex> and <tex>$r$</tex> is fixed, the maximum asymmetry approaches <tex>$(r-1)r^{n-1}$</tex>.","PeriodicalId":329986,"journal":{"name":"2019 IEEE 49th International Symposium on Multiple-Valued Logic (ISMVL)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132285653","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Four-Valued Logic in UML/OCL Models: A “Playground” for the MVL Community UML/OCL模型中的四值逻辑:MVL社区的“游乐场”
2019 IEEE 49th International Symposium on Multiple-Valued Logic (ISMVL) Pub Date : 2019-05-21 DOI: 10.1109/ISMVL.2019.00019
Nils Przigoda, Judith Przigoda, R. Wille
{"title":"Four-Valued Logic in UML/OCL Models: A “Playground” for the MVL Community","authors":"Nils Przigoda, Judith Przigoda, R. Wille","doi":"10.1109/ISMVL.2019.00019","DOIUrl":"https://doi.org/10.1109/ISMVL.2019.00019","url":null,"abstract":"The Unified Modeling Language (UML) together with the Object Constraint Language (OCL) are the description means for modeling and specifying, e. g., software systems in early stages of the design. They allow to define components, their relations, and constraints of a system while, at the same time, hide precise implementation details. Despite providing a “blueprint” for the desired systems, UML/OCL descriptions also allow for an early validation and verification of the design. However, an often overseen feature of UML/OCL is that it explicitly allows for the consideration of irregular variables assignments such as null and invalid-yielding a four-valued logic in the current UML/OCL version. In this tutorial, we provide an overview on this feature and the resulting four-valued UML/OCL logic. More precisely, we are providing a review of the corresponding description means as well as existing methods that allow for a validation and verification of the corresponding models. By this, we are aiming to introduce those UML/OCL descriptions and methods to the MVL community in order to trigger new directions for research and application.","PeriodicalId":329986,"journal":{"name":"2019 IEEE 49th International Symposium on Multiple-Valued Logic (ISMVL)","volume":"114 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132583517","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Spectral Invariant Operations in the p-valued Spectral Domain p值谱域的谱不变运算
2019 IEEE 49th International Symposium on Multiple-Valued Logic (ISMVL) Pub Date : 2019-05-21 DOI: 10.1109/ISMVL.2019.00020
C. Moraga, M. Stankovic, R. Stankovic
{"title":"Spectral Invariant Operations in the p-valued Spectral Domain","authors":"C. Moraga, M. Stankovic, R. Stankovic","doi":"10.1109/ISMVL.2019.00020","DOIUrl":"https://doi.org/10.1109/ISMVL.2019.00020","url":null,"abstract":"The paper studies the generation of ternary bent functions by permuting the circular Vilenkin-Chrestenson spectrum of a known bent function. We call this spectral invariant operations in the spectral domain, in analogy to the spectral invariant operations in the domain of the functions. Furthermore, related generalized permutations are derived to obtain new bent functions in the original domain.","PeriodicalId":329986,"journal":{"name":"2019 IEEE 49th International Symposium on Multiple-Valued Logic (ISMVL)","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122372917","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Realizing all Index Generation Functions by the Row-Shift Method 用行移位法实现所有索引生成函数
2019 IEEE 49th International Symposium on Multiple-Valued Logic (ISMVL) Pub Date : 2019-05-21 DOI: 10.1109/ISMVL.2019.00032
J. T. Butler, Tsutomu Sasao
{"title":"Realizing all Index Generation Functions by the Row-Shift Method","authors":"J. T. Butler, Tsutomu Sasao","doi":"10.1109/ISMVL.2019.00032","DOIUrl":"https://doi.org/10.1109/ISMVL.2019.00032","url":null,"abstract":"We propose a method that allows the realization of all index generation functions using flexible decomposition charts. It is based on the first-fit decreasing heuristic used by Tarjan and Yao to store sparse matrices. We show that the first-fit-decreasing heuristic can yield nonminimal tables in the case of functions that do not satisfy the harmonic decay property. We show that an index generation function representation that just satisfies the harmonic decay property, called the perfect harmonic decay sequence, allows a simple matrix approach for calculating an error matrix, that describes the degree to which a given function representation departs from a perfect harmonic decay sequence. This gives insight into how function representations can be changed to realize the harmonic decay criteria. We also show the existence of sparse function representations for which no compression is possible. In such a case, we can still implement the corresponding index generation function, but it requires the largest resources possible.","PeriodicalId":329986,"journal":{"name":"2019 IEEE 49th International Symposium on Multiple-Valued Logic (ISMVL)","volume":"121 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121862599","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Threshold Physical Unclonable Functions 阈值物理不可克隆功能
2019 IEEE 49th International Symposium on Multiple-Valued Logic (ISMVL) Pub Date : 2019-05-21 DOI: 10.1109/ISMVL.2019.00018
F. Marranghello, Yang Yu, E. Dubrova
{"title":"Threshold Physical Unclonable Functions","authors":"F. Marranghello, Yang Yu, E. Dubrova","doi":"10.1109/ISMVL.2019.00018","DOIUrl":"https://doi.org/10.1109/ISMVL.2019.00018","url":null,"abstract":"Physical Unclonable Functions (PUFs) have been proposed as a tamper-resistant alternative to the traditional methods for secret key generation and challenge-response authentication. Although many different types of PUFs have been presented, the search for more efficient, reliable and secure PUF designs continues. In this paper, we introduce a new class of PUFs, called threshold PUFs. We show that, in principle, any n- input threshold logic gate can be used as a base for building an n-input PUF. This opens up the possibility of using a rich body of knowledge on threshold logic implementations for designing PUFs. As a proof of concept, we implement and evaluate binary and ternary PUFs based on recently proposed threshold logic flip-flops.","PeriodicalId":329986,"journal":{"name":"2019 IEEE 49th International Symposium on Multiple-Valued Logic (ISMVL)","volume":"432 6","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133940254","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Remarks on Similarities Among Ternary Bent Functions 关于三元弯曲函数间相似性的几点评述
2019 IEEE 49th International Symposium on Multiple-Valued Logic (ISMVL) Pub Date : 2019-05-21 DOI: 10.1109/ISMVL.2019.00022
R. Stankovic, M. Stankovic, J. Astola, C. Moraga
{"title":"Remarks on Similarities Among Ternary Bent Functions","authors":"R. Stankovic, M. Stankovic, J. Astola, C. Moraga","doi":"10.1109/ISMVL.2019.00022","DOIUrl":"https://doi.org/10.1109/ISMVL.2019.00022","url":null,"abstract":"Bent functions have low autocorrelation and it is interesting to consider if there are some relationships that may be found among values a bent function takes, i.e., to find some possible patterns expressing similarity among certain bent functions in terms of the structure of their value-vectors. A possible approach towards exploring that problem proposed in this paper is based on partial Vilenkin-Chrestenson spectra, which are conveniently interpreted as matrix-valued Vilenkin-Chrestenson spectra of matrix-valued equivalents of ternary bent functions.","PeriodicalId":329986,"journal":{"name":"2019 IEEE 49th International Symposium on Multiple-Valued Logic (ISMVL)","volume":"73 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127588784","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A Ternary Fuzzy Extractor for Efficient Cryptographic Key Generation 一种有效生成密码密钥的三元模糊提取器
2019 IEEE 49th International Symposium on Multiple-Valued Logic (ISMVL) Pub Date : 2019-05-21 DOI: 10.1109/ISMVL.2019.00017
Kohei Kazumori, Rei Ueno, N. Homma
{"title":"A Ternary Fuzzy Extractor for Efficient Cryptographic Key Generation","authors":"Kohei Kazumori, Rei Ueno, N. Homma","doi":"10.1109/ISMVL.2019.00017","DOIUrl":"https://doi.org/10.1109/ISMVL.2019.00017","url":null,"abstract":"This paper presents an efficient cryptographic key generation from ternary physically unclonable functions (PUFs). The basic concept of our cryptographic key generation is to introduce ternary fuzzy extractors (FEs) to take advantage of ternary PUFs. First, we show the insecurity present when combining ternary PUF responses with conventional binary FEs. We then present the ternary FE that is compatible with ternary PUFs. Through experimental implementation, we confirm that the proposed FE can realize PUF-based cryptographic key generation with a 61% lower hardware cost than conventional binary FEs.","PeriodicalId":329986,"journal":{"name":"2019 IEEE 49th International Symposium on Multiple-Valued Logic (ISMVL)","volume":"116 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130734962","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Design of Quad-Edge-Triggered Sequential Logic Circuits for Ternary Logic 用于三元逻辑的四边触发顺序逻辑电路设计
2019 IEEE 49th International Symposium on Multiple-Valued Logic (ISMVL) Pub Date : 2019-05-21 DOI: 10.1109/ISMVL.2019.00015
Sunmean Kim, Sung-Yun Lee, Sunghye Park, Seokhyeong Kang
{"title":"Design of Quad-Edge-Triggered Sequential Logic Circuits for Ternary Logic","authors":"Sunmean Kim, Sung-Yun Lee, Sunghye Park, Seokhyeong Kang","doi":"10.1109/ISMVL.2019.00015","DOIUrl":"https://doi.org/10.1109/ISMVL.2019.00015","url":null,"abstract":"We propose a quad-edge-triggered flip-flop which captures and propagates a ternary data signal at four-edges of a ternary clock signal. The proposed circuit uses carbon nanotube FETs and consists of four types of logic gate: ternary clock driver, standard ternary inverter, binary inverter, and transmission gate. HSPICE simulation result has confirmed that power consumption of QETFF is lower than conventional single-edge-triggered flip-flop. The average power consumption is reduced by 31 % in flip-flop and 75 % in clock tree. We designed a ternary serial adder using QETFF and the energy efficiency of the proposed circuit is significantly improved compared to the previous design of ternary serial adder.","PeriodicalId":329986,"journal":{"name":"2019 IEEE 49th International Symposium on Multiple-Valued Logic (ISMVL)","volume":"71 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128124545","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
下一页 尾页
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整，为了账户安全，请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
请完成安全验证×
相关产品
×
本文献相关产品
联系我们：info@booksci.cn Book学术提供免费学术资源搜索服务，方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号：604180095
Book学术官方微信