Demonstration of ternary devices and circuits using dual channel graphene barristors

Abstract

Graphene barristors with two parallel connected n-type and undoped graphene channels are used to build a ternary logic switch. Three distinctly separated out current levels are successfully demonstrated and the experimental device parameters obtained from the graphene barristor based ternary switch are used to model the ternary circuit modules. Well-behaving standard ternary inverter, NMIN, NMAX, and ternary comparator have been obtained, confirming the feasibility of large scale integration of ternary logic devices.