IEEE/SEMI 1996 Advanced Semiconductor Manufacturing Conference and Workshop. Theme-Innovative Approaches to Growth in the Semiconductor Industry. ASMC 96 Proceedings最新文献_第2页

Semiconductor business, process, product and fab influence on throughput, cycle time and chip cost 半导体业务、工艺、产品和晶圆厂对产量、周期时间和芯片成本有影响

IEEE/SEMI 1996 Advanced Semiconductor Manufacturing Conference and Workshop. Theme-Innovative Approaches to Growth in the Semiconductor Industry. ASMC 96 Proceedings Pub Date : 1996-11-12 DOI: 10.1109/ASMC.1996.557984

C. Kraft

引用次数: 0

The impact of data integration on yield enhancement 数据整合对产量提高的影响

IEEE/SEMI 1996 Advanced Semiconductor Manufacturing Conference and Workshop. Theme-Innovative Approaches to Growth in the Semiconductor Industry. ASMC 96 Proceedings Pub Date : 1996-11-12 DOI: 10.1109/ASMC.1996.557983

S. Smith, C. Gondran

{"title":"The impact of data integration on yield enhancement","authors":"S. Smith, C. Gondran","doi":"10.1109/ASMC.1996.557983","DOIUrl":"https://doi.org/10.1109/ASMC.1996.557983","url":null,"abstract":"Yield enhancement engineering usually focuses on three areas of interest: investigation of low yielding lots (or lots with abnormal fail signatures), elimination of in-line defect process excursions and improvement of baseline product yield. These tasks require that engineers digest the data necessary to lead them to what needs to be done to find root cause for a given yield issue. The process of gathering and digesting the data necessary to arrive at the root cause of a yield problem can take a significant period of time (i.e., days or, in some cases, weeks.) There are many reasons why it takes so long to gather the necessary data needed for yield analysis, among them are: (1) data often needs to be extracted through many different software interfaces each of which may require a different language knowledge, (2) the data extract itself may require access to a particular machine and require a custom (i.e., new) database call to be written, (3) the multiplicity of database extracts require a significant portion of time to complete (i.e., a relational database is not always used), (4) once extracts are completed data must be formatted for analysis, (5) data overlay from several sources is often not available and manual methods must be employed. It is very clear to anyone who has faced the aforementioned data \"islands\" that integration of data sources into one database which is easily and quickly accessible through one user interface will significantly reduce time to root cause for many yield issues.","PeriodicalId":325204,"journal":{"name":"IEEE/SEMI 1996 Advanced Semiconductor Manufacturing Conference and Workshop. Theme-Innovative Approaches to Growth in the Semiconductor Industry. ASMC 96 Proceedings","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-11-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130529816","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Partnership for a rapid yield enhancement solution in a manufacturing environment on a 0.65 /spl mu/m triple level metal device 在0.65 /spl mu/m三层金属装置的制造环境中，合作提供快速提高产量的解决方案

IEEE/SEMI 1996 Advanced Semiconductor Manufacturing Conference and Workshop. Theme-Innovative Approaches to Growth in the Semiconductor Industry. ASMC 96 Proceedings Pub Date : 1996-11-12 DOI: 10.1109/ASMC.1996.558105

G. Kong, J. W. Peterson, M. Cherniawski

{"title":"Partnership for a rapid yield enhancement solution in a manufacturing environment on a 0.65 /spl mu/m triple level metal device","authors":"G. Kong, J. W. Peterson, M. Cherniawski","doi":"10.1109/ASMC.1996.558105","DOIUrl":"https://doi.org/10.1109/ASMC.1996.558105","url":null,"abstract":"A speed related problem degraded the yield of a 0.65 /spl mu/m triple level metal device. Reducing the channel length was the most simple and cost effective approach to improve device speed. However, an overly aggressive downsized channel length could also cause device leakage. To determine the optimal channel length with adequate speed performance and without leakage, a series of experiments were run to establish a yield model as a function of channel length and device threshold voltage (Vt). The Vt was varied by adjusting the channel implant dose. Instead of using masks with different sizings, the channel length was varied by adjusting photo exposure time and lightly doped drain (LDD) implant dose. This approach greatly reduced the cost of experiments and shortened the learning cycle. A strong correlation was established by Analysis of Variances (ANOVA) between yield and p-channel transistor length. The range of operational channel length was defined, where higher channel length caused poor speed performance and lower channel length caused device leakage. An interim process with increased photo exposure time was implemented immediately to ensure die shipment quantity and delivery schedule. In parallel, the optimal mask sizing was determined and this mask regenerated such that the original photo exposure when used with this mask would re-center the process. The interim process was then eliminated to streamline manufacturability. The optimized process resulted in significant yield improvement. Strong partnerships were established among device engineering, process engineering, and manufacturing groups to achieve yield enhancement in a timely manner without compromising manufacturability and customer deliveries.","PeriodicalId":325204,"journal":{"name":"IEEE/SEMI 1996 Advanced Semiconductor Manufacturing Conference and Workshop. Theme-Innovative Approaches to Growth in the Semiconductor Industry. ASMC 96 Proceedings","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-11-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130966762","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Meeting project commitments with teamwork 与团队合作完成项目承诺

IEEE/SEMI 1996 Advanced Semiconductor Manufacturing Conference and Workshop. Theme-Innovative Approaches to Growth in the Semiconductor Industry. ASMC 96 Proceedings Pub Date : 1996-11-12 DOI: 10.1109/ASMC.1996.558111

T. McCarron

引用次数: 0

Monitoring particulate contaminants in a metal etch system 监测金属蚀刻系统中的微粒污染物

IEEE/SEMI 1996 Advanced Semiconductor Manufacturing Conference and Workshop. Theme-Innovative Approaches to Growth in the Semiconductor Industry. ASMC 96 Proceedings Pub Date : 1996-11-12 DOI: 10.1109/ASMC.1996.558022

K. Dang, T. Desanti, B. Yoo, Y. Khawaja

{"title":"Monitoring particulate contaminants in a metal etch system","authors":"K. Dang, T. Desanti, B. Yoo, Y. Khawaja","doi":"10.1109/ASMC.1996.558022","DOIUrl":"https://doi.org/10.1109/ASMC.1996.558022","url":null,"abstract":"Summary form only given, as follows. Four alternative methods of monitoring particulate contaminants on the LRC 4600 metal etch cluster tool are described The etch process involves the formation of polymeric byproducts that protect metal sidewalls from being undercut. These byproducts also adhere to the tool's chamber walls. Deposition of polymeric flakes on the wafer during the etch process blocks the etch and results in metal shorts. Therefore, regular monitoring and control of particles is a necessity. The monitoring schemes include the use of bare silicon wafers under a plasma-off environment and the use of photoresist coated wafers under plasma-on conditions. Regularly scheduled line monitors (LMs) that simulate the product flow are also processed through each metal etch tool to detect and prevent failures in the backend of the wafer fabrication process. In addition, an in-situ particle monitor (ISPM) is used to monitor particles exiting in the main etch chamber's exhaust line. In order to minimize test wafer usage and cycle-time an attempt was made to correlate the various monitoring schemes, the results of which are described.","PeriodicalId":325204,"journal":{"name":"IEEE/SEMI 1996 Advanced Semiconductor Manufacturing Conference and Workshop. Theme-Innovative Approaches to Growth in the Semiconductor Industry. ASMC 96 Proceedings","volume":"165 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-11-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131690808","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Fluorine induced formation of intermetal dielectric defects 氟诱导金属间介电缺陷的形成

IEEE/SEMI 1996 Advanced Semiconductor Manufacturing Conference and Workshop. Theme-Innovative Approaches to Growth in the Semiconductor Industry. ASMC 96 Proceedings Pub Date : 1996-11-12 DOI: 10.1109/ASMC.1996.558025

M. Tiemessen, P. Wang, P. Oakey, L. Liu, S. Schauer, C. Bowen

{"title":"Fluorine induced formation of intermetal dielectric defects","authors":"M. Tiemessen, P. Wang, P. Oakey, L. Liu, S. Schauer, C. Bowen","doi":"10.1109/ASMC.1996.558025","DOIUrl":"https://doi.org/10.1109/ASMC.1996.558025","url":null,"abstract":"Defects were first observed on engineering test wafers during Contact Photolithography ADI (After Develop Inspection). The defects had the appearance of large white spots, which were several microns in diameter. SEM and TEM studies revealed that the defects were delaminations at the interface between the thermal oxide and the TEOS at the contact module of the wafer process. The results from defect partitioning showed the defects first appeared after high temperature BPSG anneal. It was also observed that only the first one or two wafers in a lot had defects. Chemical contamination analysis using SIMS identified high fluorine concentrations. The results showed that the fluorine concentration of the first wafer through the TEOS process was >30% higher than the rest of the wafers in the lot. Several experimental matrices were designed and conducted to quickly contain the problem, to investigate the defect mechanisms, and to eliminate the defects. It has been concluded that the fluorine outgassing from the P/sup +/ implanted area (BF/sub 2/ implant) during high temperature BPSG anneal is the major mechanism of the defect phenomena. TEOS chamber precoating has been shown to reduce the fluorine integrated concentration of the TEOS film and has eliminated the defects.","PeriodicalId":325204,"journal":{"name":"IEEE/SEMI 1996 Advanced Semiconductor Manufacturing Conference and Workshop. Theme-Innovative Approaches to Growth in the Semiconductor Industry. ASMC 96 Proceedings","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-11-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126779025","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

Interactive engineering documentation 交互式工程文档

IEEE/SEMI 1996 Advanced Semiconductor Manufacturing Conference and Workshop. Theme-Innovative Approaches to Growth in the Semiconductor Industry. ASMC 96 Proceedings Pub Date : 1996-11-12 DOI: 10.1109/ASMC.1996.557997

A. Ludford, D. Art

{"title":"Interactive engineering documentation","authors":"A. Ludford, D. Art","doi":"10.1109/ASMC.1996.557997","DOIUrl":"https://doi.org/10.1109/ASMC.1996.557997","url":null,"abstract":"With the rapid development of the Internet, Intranets and various Internet browsers, companies are now able to link to a multitude of information resources on-line at a much faster and more user friendly manner than ever before. The utilization of this technology is still in its infancy and the possibilities which it offers are numerous. In the realm of Facilities Management AMD is taking advantage of the vast opportunities offered by the flexibility, low cost, speed, and improved communications offered by the development of these tools. This document introduces individuals to the benefits of developing and maintaining an Intranet Engineering Documentation database within the Facilities organization of a company. Emphasis will be placed on six distinct areas: Facilities Systems, Equipment, Drawings, Databases, Costs, and Benefits. This paper outlines AMD's Facility Resource Database written and linked specifically for an existing network server (A Web Server is not mandatory). Material covered includes: conversion of engineering documentation from paper to computer copy and the utilization of Netscape as the navigator, viewer, and linking tool for the various Facilities data, drawings, equipment specifications, and existing databases. When individuals understand the ideas presented in this tutorial, they will have the tools needed to develop similar databases with minimal expenses.","PeriodicalId":325204,"journal":{"name":"IEEE/SEMI 1996 Advanced Semiconductor Manufacturing Conference and Workshop. Theme-Innovative Approaches to Growth in the Semiconductor Industry. ASMC 96 Proceedings","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-11-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115260099","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Engineering data analysis using Discovery [semiconductor manufacture] 使用Discovery进行工程数据分析[半导体制造]

IEEE/SEMI 1996 Advanced Semiconductor Manufacturing Conference and Workshop. Theme-Innovative Approaches to Growth in the Semiconductor Industry. ASMC 96 Proceedings Pub Date : 1996-11-12 DOI: 10.1109/ASMC.1996.558100

L. Fowler, T. Davis

{"title":"Engineering data analysis using Discovery [semiconductor manufacture]","authors":"L. Fowler, T. Davis","doi":"10.1109/ASMC.1996.558100","DOIUrl":"https://doi.org/10.1109/ASMC.1996.558100","url":null,"abstract":"The ability to rapidly turn data into information is a necessity in the semiconductor industry. Furthermore, the ability to analyze and correlate yield results to electrical test results and in-process data is essential in the overall yield enhancement effort. The need exists to have a centralized database to store all aspects of engineering data, and analysis tools that will communicate with the database. KLA obtained the rights to Motorola's engineering database (Synergy) and analysis software (EDAS/sup TM/) and now markets it as Discovery/sup TM/. The Discovery system provides the capability of storing all probe results, in-process, equipment and SPC data, as well as bitmap and defect die level summary information. In addition, EDAS provides basic analytical software capabilities specifically for the semiconductor industry. MOS-13 and KLA partnered in the installation of Discovery into Motorola's newest fab, MOS-13. The goal was to implement an engineering database and analysis system to provide engineering with centralized access to needed data and analytical software that would assist them in their needs. Electrical test, and Probe bin, characterization, and bitmap die level summary data are currently being loaded into the Discovery database. The Discovery database, EDAS, and a newly created reporting tool have become an essential part of MOS-13.","PeriodicalId":325204,"journal":{"name":"IEEE/SEMI 1996 Advanced Semiconductor Manufacturing Conference and Workshop. Theme-Innovative Approaches to Growth in the Semiconductor Industry. ASMC 96 Proceedings","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-11-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133460081","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Photocluster productivity improvement 光簇生产率的提高

IEEE/SEMI 1996 Advanced Semiconductor Manufacturing Conference and Workshop. Theme-Innovative Approaches to Growth in the Semiconductor Industry. ASMC 96 Proceedings Pub Date : 1996-11-12 DOI: 10.1109/ASMC.1996.557963

Sharon Sisler

引用次数: 0

Integrated yield management: a systematic approach to yield management 综合产量管理:一种系统化的产量管理方法

IEEE/SEMI 1996 Advanced Semiconductor Manufacturing Conference and Workshop. Theme-Innovative Approaches to Growth in the Semiconductor Industry. ASMC 96 Proceedings Pub Date : 1996-11-12 DOI: 10.1109/ASMC.1996.558095

M. Effron

{"title":"Integrated yield management: a systematic approach to yield management","authors":"M. Effron","doi":"10.1109/ASMC.1996.558095","DOIUrl":"https://doi.org/10.1109/ASMC.1996.558095","url":null,"abstract":"IYM/sup TM/ is a systematic approach to yield management developed and refined multiple, highly successful, leading World Class FABs. The power of IYM lies in its ability to focus total enterprise resources for the single purpose of dramatically improving yields. There are six critical components of IYM discussed in this paper: (1) Preproduction Engineering practices to maximize and focus attention an design and probe yields prior to product qualification and production ramp; (2) Systematic, Long Loop analysis for 100% yield lass explanation modeled into partitioned yield owners based upon a targeted limited yields, learning plan; (3) Utilization of critical Short Loop control systems tied to specific inline limited yield targets chosen against Long Loop failure analysis; (4) Amplification and enlargement of the responsibilities of Operators and Maintenance personnel to function as Short Loop Engineers; (5) Application and use of interactive, user friendly, Computer Integrated Manufacturing (CIM) information creation system tied to the enterprise data collection points; (6) Establishment of a micro and macro Critical Area Yield Model to correlate, validate and predict from Short Loop controls their Long Loop results. Being central to the IYM flow, Critical Area.","PeriodicalId":325204,"journal":{"name":"IEEE/SEMI 1996 Advanced Semiconductor Manufacturing Conference and Workshop. Theme-Innovative Approaches to Growth in the Semiconductor Industry. ASMC 96 Proceedings","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-11-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128036354","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 5