发布求助
文献互助 智能选刊 最新文献

Extended Abstracts of the Fifth International Workshop on Junction Technology最新文献

筛选
英文 中文
Using boron cluster ion implantation to fabricate ultra-shallow junctions 硼簇离子注入制备超浅结
Extended Abstracts of the Fifth International Workshop on Junction Technology Pub Date : 2005-06-07 DOI: 10.1109/IWJT.2005.203870
D. Jacobson
{"title":"Using boron cluster ion implantation to fabricate ultra-shallow junctions","authors":"D. Jacobson","doi":"10.1109/IWJT.2005.203870","DOIUrl":"https://doi.org/10.1109/IWJT.2005.203870","url":null,"abstract":"B/sub 18/H/sub x//sup +/ and B ion implantation have been used to fabricate the SDE of pMOSFETs with gate lengths of /spl sim/60 nm. Ultra high resolution mass spectra of natural abundance B/sub 18/H/sub 22/ and mass 11 isotopically enriched B/sub 18/H/sub 22/ have been used to achieve deconvolution of the binominal distribution from ion states present in the cluster ion beam. The cluster source has been specifically designed to maintain the integrity of the cluster during the ionization process. The results of B/sub 18/H/sub x//sup +/ and B are compared from the viewpoint of transistor performance. The implants were performed at equivalent process energies and doses. It has been shown that B implantation greatly increases the throughput of low energy boron implants while delivering uncompromised device performance.","PeriodicalId":307038,"journal":{"name":"Extended Abstracts of the Fifth International Workshop on Junction Technology","volume":"453 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-06-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123047039","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Minimization of pattern dependence by optimized flash lamp annealing 通过优化闪光灯退火最小化图案依赖性
Extended Abstracts of the Fifth International Workshop on Junction Technology Pub Date : 2005-06-07 DOI: 10.1109/IWJT.2005.203882
T. Ito, K. Matsuo, H. Itokawa, T. Itani, N. Tarnaoki, Y. Honguh, K. Suguro, T. Yokomori, T. Owada, Y. Goto, Y. Nozaki, H. Murayama, H. Kiyama, T. Kusuda
{"title":"Minimization of pattern dependence by optimized flash lamp annealing","authors":"T. Ito, K. Matsuo, H. Itokawa, T. Itani, N. Tarnaoki, Y. Honguh, K. Suguro, T. Yokomori, T. Owada, Y. Goto, Y. Nozaki, H. Murayama, H. Kiyama, T. Kusuda","doi":"10.1109/IWJT.2005.203882","DOIUrl":"https://doi.org/10.1109/IWJT.2005.203882","url":null,"abstract":"This paper presents the improvement of the flash lamp annealing (FLA) process to achieve the ultra-shallow junction (USJ) requirement for high-performance CMOSFETs. Issues concerning ultra-rapid activation are discussed; namely, crystal damage (residual defect, deformation and crack) and pattern dependence, We report that the FLA process with long pulse duration and cap layers can improve USJ characteristics for various design-scale cells.","PeriodicalId":307038,"journal":{"name":"Extended Abstracts of the Fifth International Workshop on Junction Technology","volume":"239 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-06-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123097420","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Impact of C implantation on electrical properties of NiSi/Si contact C注入对NiSi/Si触点电学性能的影响
Extended Abstracts of the Fifth International Workshop on Junction Technology Pub Date : 2005-06-07 DOI: 10.1109/IWJT.2005.203892
O. Nakatsuka, K. Okubo, A. Sakai, M. Ogawa, S. Zaima
{"title":"Impact of C implantation on electrical properties of NiSi/Si contact","authors":"O. Nakatsuka, K. Okubo, A. Sakai, M. Ogawa, S. Zaima","doi":"10.1109/IWJT.2005.203892","DOIUrl":"https://doi.org/10.1109/IWJT.2005.203892","url":null,"abstract":"We investigated the influence of C implantation on electrical properties of NiSi/Si contact. Increase in sheet resistance of NiSi is effectively suppressed due to preventing the agglomeration of NiSi with C implantation. C into Si also reduces contact resistance in NiSi/p/sup +/-Si system with pile-up of B at the NiSi/Si interface. C implantation promises the high thermal robustness of NiSi and the low resistance in NiSi/Si system for future Si devices.","PeriodicalId":307038,"journal":{"name":"Extended Abstracts of the Fifth International Workshop on Junction Technology","volume":"60 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-06-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134207151","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Plasma doping: production worthy solution for 65nm and beyond technology nodes 等离子体掺杂:适用于65nm及以上技术节点的具有生产价值的解决方案
Extended Abstracts of the Fifth International Workshop on Junction Technology Pub Date : 2005-06-07 DOI: 10.1109/IWJT.2005.203885
Z. Fang, E. Arevalo, T. Miller, H. Persing, E. Winder, V. Singh
{"title":"Plasma doping: production worthy solution for 65nm and beyond technology nodes","authors":"Z. Fang, E. Arevalo, T. Miller, H. Persing, E. Winder, V. Singh","doi":"10.1109/IWJT.2005.203885","DOIUrl":"https://doi.org/10.1109/IWJT.2005.203885","url":null,"abstract":"65nm and beyond advanced logic and DRAM devices will require decreasing junction depths and poly thickness at increasing doses. Present beam-line technology will suffer decreasing throughput during this transition as a result of space charge effects. Plasma doping is a well characterized alternative to beam-line technology that meets the doping requirements for <65nm ITRS technology nodes. This is accomplished at superior throughput levels which are largely energy insensitive. The simplicity of the plasma doping tool design and maturing process control features offer a promising future for production worthiness of this technique. Varian's PLAD tool has demonstrated advanced logic USJ SDE/SD formation as well as advanced DRAM poly and SD doping capability. In this paper we present as-implanted and annealed SIMS profiles to highlight the sub-kV doping capability of the PLAD system for PMOS transistor fabrication and its impact on the R/sub s/ vs. X/sub J/ figure of merit. TEM data will also be presented to show lack of residual damage after a high nominal dose implant which agrees well with low junction leakage observed on PLAD doped devices. The production worthiness of the processes mentioned above is demonstrated with uniformity, repeatability, metals purity and particle performance comparable to that attainable with beam-line implants.","PeriodicalId":307038,"journal":{"name":"Extended Abstracts of the Fifth International Workshop on Junction Technology","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-06-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133102640","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Source/drain resistance modeling in bulk and ultra-thin body SOI MOSFETs 大体积和超薄体SOI mosfet的源漏电阻建模
Extended Abstracts of the Fifth International Workshop on Junction Technology Pub Date : 2005-06-07 DOI: 10.1109/IWJT.2005.203894
S. Kim, J. Yuan, J. Woo
{"title":"Source/drain resistance modeling in bulk and ultra-thin body SOI MOSFETs","authors":"S. Kim, J. Yuan, J. Woo","doi":"10.1109/IWJT.2005.203894","DOIUrl":"https://doi.org/10.1109/IWJT.2005.203894","url":null,"abstract":"In this paper, the optimization of the S/D extrinsic resistance for the recessed and elevated S/D silicide contact structure through physical compact modeling and 2-dimensional TCAD simulation are investigated. A new simplified physical compact modeling is developed and applied to 90-nm SOI CMOS technology to investigate the sub-resistance component contribution and parameter sensitivity. The model-based guideline for the optimum location of silicide/Si interface in elevated S/D structure is proposed with respect to the device parameters including contact size and SOI thickness.","PeriodicalId":307038,"journal":{"name":"Extended Abstracts of the Fifth International Workshop on Junction Technology","volume":"41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-06-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122092792","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Simulation of high-temperature millisecond annealing based on an atomistic modeling of boron diffusion in silicon 基于硼在硅中扩散原子模型的高温毫秒退火模拟
Extended Abstracts of the Fifth International Workshop on Junction Technology Pub Date : 2005-06-07 DOI: 10.1109/IWJT.2005.203881
M. Hane, T. Ikezawa
{"title":"Simulation of high-temperature millisecond annealing based on an atomistic modeling of boron diffusion in silicon","authors":"M. Hane, T. Ikezawa","doi":"10.1109/IWJT.2005.203881","DOIUrl":"https://doi.org/10.1109/IWJT.2005.203881","url":null,"abstract":"In this paper, boron ion implantation and subsequent annealing processes in Si were modeled with two kinds of atomistic methods, i.e. molecular dynamics (MD) and Monte Carlo (MC) methods. Through the simulation study, high temperature millisecond annealing is proven to be promising technique, while the simulation results indicate that it still needs pre-/post thermal/amorphization processes being optimized for actual device manufacturing.","PeriodicalId":307038,"journal":{"name":"Extended Abstracts of the Fifth International Workshop on Junction Technology","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-06-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122751743","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Which junction for advanced CMOS?-theory, benchmark and predictions 先进的CMOS采用哪个结?-理论、基准和预测
Extended Abstracts of the Fifth International Workshop on Junction Technology Pub Date : 2005-06-07 DOI: 10.1109/IWJT.2005.203865
T. Skotnicki
{"title":"Which junction for advanced CMOS?-theory, benchmark and predictions","authors":"T. Skotnicki","doi":"10.1109/IWJT.2005.203865","DOIUrl":"https://doi.org/10.1109/IWJT.2005.203865","url":null,"abstract":"In this paper, the theoretical considerations about junction design for advanced CMOS, to benchmark the most recent and advanced results, and make some predictions on the future needs are presented. Junction scaling is the key difference that grants better electrostatic integrity (essentially smaller DIBL) to SON/SOI and DG structures if compared with bulk. With the use of these structures, DIBL can be kept under control (<100 mV) down to 5-10 nm gate length.","PeriodicalId":307038,"journal":{"name":"Extended Abstracts of the Fifth International Workshop on Junction Technology","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-06-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126923508","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Formation of atomically flat interface and effect of silicidation condition on Schottky contact characteristics in ErSi/sub 1.7//Si(100) system ErSi/sub 1.7//Si(100)体系中原子平面界面的形成及硅化条件对Schottky接触特性的影响
Extended Abstracts of the Fifth International Workshop on Junction Technology Pub Date : 2005-06-07 DOI: 10.1109/IWJT.2005.203893
Y. Tsuchiya, T. Irisawa, A. Yagishita, J. Koga
{"title":"Formation of atomically flat interface and effect of silicidation condition on Schottky contact characteristics in ErSi/sub 1.7//Si(100) system","authors":"Y. Tsuchiya, T. Irisawa, A. Yagishita, J. Koga","doi":"10.1109/IWJT.2005.203893","DOIUrl":"https://doi.org/10.1109/IWJT.2005.203893","url":null,"abstract":"We have investigated the Schottky barrier height of ErSi/sub 1.7/ and suitable formation process to achieve the ideal interface. Atomically flat interface has been achieved by high-temperature (700/spl deg/C) furnace annealing, as well as oxide-block W-cap layer. Under this condition, Schottky barrier height value for electron of lower than 0.4 eV has been obtained. In addition, careful control of silicidation anneal is quite important to achieve ideal ErSi/sub 1.7//Si interface.","PeriodicalId":307038,"journal":{"name":"Extended Abstracts of the Fifth International Workshop on Junction Technology","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-06-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132135244","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Decaborane ion implantation for sub-40-nm gate-length PMOSFETs to enable formation of steep ultra-shallow junction and small threshold voltage fluctuation 十硼烷离子注入亚40nm栅极长pmosfet，可形成陡的超浅结和小的阈值电压波动
Extended Abstracts of the Fifth International Workshop on Junction Technology Pub Date : 2005-06-07 DOI: 10.1109/IWJT.2005.203871
T. Aoyama, M. Fukuda, Y. Nara, S. Umisedo, N. Hamamoto, M. Tanjo, T. Nagayama
{"title":"Decaborane ion implantation for sub-40-nm gate-length PMOSFETs to enable formation of steep ultra-shallow junction and small threshold voltage fluctuation","authors":"T. Aoyama, M. Fukuda, Y. Nara, S. Umisedo, N. Hamamoto, M. Tanjo, T. Nagayama","doi":"10.1109/IWJT.2005.203871","DOIUrl":"https://doi.org/10.1109/IWJT.2005.203871","url":null,"abstract":"In this paper, the decaborane molecular ion implantation for formation of an ultra-shallow junction of sub-40-nm PMOSFETs is investigated, and its high-performance are demonstrated. B/sub 10/H/sub x//sup +/ implantation can form a shallow and steep USJ with low resistivity and can precisely control the beam without blow-up and energy contamination, compared with the B/sup +/ monomer implantation. PMOSFETs using B/sub 10/H/sub x//sup +/ implantation for source/drain extensions achieve 6-nm shorter Vth roll-off characteristic without degradation of I/sub on/-I/sub off/ characteristic. Therefore, CV/I values can be improved by over 10%. In addition, the precisely controllable and well-collimated beam results occur alongside the Vth fluctuation suppression. The average improvement of Vth fluctuations among extensive gate length (35 to 200 nm) is 14%.","PeriodicalId":307038,"journal":{"name":"Extended Abstracts of the Fifth International Workshop on Junction Technology","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-06-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115564195","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Hydrogen effect on ultra-shallow arsenic n/sup +//p junction formed by AsH/sub 3/ plasma doping (PLAD) AsH/sub - 3/等离子体掺杂(PLAD)形成的超浅砷n/sup +//p结的氢效应
Extended Abstracts of the Fifth International Workshop on Junction Technology Pub Date : 2005-06-07 DOI: 10.1109/IWJT.2005.203884
S. Heo, S. Baek, Dongkyu Lee, Gyongho Buh, Yu-jeung Sin, H. Hwang
{"title":"Hydrogen effect on ultra-shallow arsenic n/sup +//p junction formed by AsH/sub 3/ plasma doping (PLAD)","authors":"S. Heo, S. Baek, Dongkyu Lee, Gyongho Buh, Yu-jeung Sin, H. Hwang","doi":"10.1109/IWJT.2005.203884","DOIUrl":"https://doi.org/10.1109/IWJT.2005.203884","url":null,"abstract":"The electrical and structural characteristics of junction was affected during the activation annealing which was interpreted as a hydrogen effect. In this work, the hydrogen effect of arsenic n/sup +//p ultra-shallow junction formed by AsH/sub 3/ (arsine) plasma doping is reported. The additional hydrogen dopant retards the dopant activation due to the hydrogen damage effect confirmed by HR-XTEM analysis. The low temperature pre-annealing efficiently reduced residual defect. To obtain the high quality arsenic n/sup +//p junction formed by plasma doping, an additional annealing method is needed to remove the hydrogen damage effect. To measure electrical characteristics such as the sheet resistance and activated carrier concentration of doped samples, hall measurement was done.","PeriodicalId":307038,"journal":{"name":"Extended Abstracts of the Fifth International Workshop on Junction Technology","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-06-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127245380","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
首页 上一页 下一页 尾页
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整，为了账户安全，请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
请完成安全验证×
相关产品
×
本文献相关产品
联系我们：info@booksci.cn Book学术提供免费学术资源搜索服务，方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号：481959085
Book学术官方微信