2014 15th Latin American Test Workshop - LATW最新文献_第3页

On reliability enhancement using adaptive core voltage scaling and variations on nanoscale FPGAs 基于自适应磁芯电压缩放和纳米级fpga的可靠性增强研究

2014 15th Latin American Test Workshop - LATW Pub Date : 2014-03-12 DOI: 10.1109/LATW.2014.6841917

P. Pfeifer, Z. Plíva, P. Weckx, B. Kaczer

{"title":"On reliability enhancement using adaptive core voltage scaling and variations on nanoscale FPGAs","authors":"P. Pfeifer, Z. Plíva, P. Weckx, B. Kaczer","doi":"10.1109/LATW.2014.6841917","DOIUrl":"https://doi.org/10.1109/LATW.2014.6841917","url":null,"abstract":"Rapidly growing portfolio of new technologies in design and manufacturing of advanced integrated circuits allow higher integration of complex structures in ultra-high nano-scale densities. However, the real new devices are sensitive subjects to unacceptable effects of changes of the internal nanostructures. Changes in parameters due to process variations or device aging along the working or its life-time can result in significant in large timing variations or critical BTI-inducted delays and may affect the final design quality and dependability, may result in delay faults, up to the device or equipment malfunction or failure. Also power supply voltage or temperature variations do typically result in significant changes of timing parameters. The presented and tested circuit, method and approach allows extremely simple control of the core voltage during critical operations or during the device lifetime. This paper include also key results of measurement of selected low-power programmable device manufactured using 28 nm low-power TSMC process, a brief comparison to the previous 45 nm LP technology node, as well as a short prediction to the next 22 nm technology node. The presented approach, data and results can also be used in design of various dependable systems.","PeriodicalId":305922,"journal":{"name":"2014 15th Latin American Test Workshop - LATW","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-03-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126188625","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Optimized hybrid verification of embedded software 嵌入式软件的优化混合验证

2014 15th Latin American Test Workshop - LATW Pub Date : 2014-03-12 DOI: 10.1109/LATW.2014.6841906

J. Behrend, Alexander Grünhage, Douglas Schroeder, D. Lettnin, Jürgen Ruf, T. Kropf, W. Rosenstiel

{"title":"Optimized hybrid verification of embedded software","authors":"J. Behrend, Alexander Grünhage, Douglas Schroeder, D. Lettnin, Jürgen Ruf, T. Kropf, W. Rosenstiel","doi":"10.1109/LATW.2014.6841906","DOIUrl":"https://doi.org/10.1109/LATW.2014.6841906","url":null,"abstract":"The verification of embedded software has become an important subject over the last years. However, neither standalone verification approaches, like simulation-based or formal verification, nor state-of-the-art hybrid/semiformal verification approaches are able to verify large and complex embedded software with hardware dependencies. This work presents an optimized scalable hybrid verification approach for the verification of embedded software with hardware dependencies using a mixed bottom-up/top-down algorithm with optimized static parameter assignment (SPA). These algorithms and methodologies like SPA and counterexample guided simulation are used to combine simulation-based and formal verification in a new way. SPA offers a way to interact between dynamic and static verification approaches based on an automated ranking heuristic of possible function parameters according to the impact on the model size. Furthermore, SPA inserts initialization code for specific function parameters into the source code under test and supports model building and optimization algorithms to reduce the state space. We have successfully applied this optimized hybrid verification methodology to an embedded software application: Motorola's Powerstone Benchmark suite. The results show that our approach scales better than stand-alone software model checkers to reach deep state spaces.","PeriodicalId":305922,"journal":{"name":"2014 15th Latin American Test Workshop - LATW","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-03-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122650018","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 4

IDSM: An improved disjoint signature monitoring scheme for processor behavioral checking IDSM:用于处理器行为检查的改进的分离签名监视方案

2014 15th Latin American Test Workshop - LATW Pub Date : 2014-03-12 DOI: 10.1109/LATW.2014.6841915

S. Bergaoui, P. Vanhauwaert, R. Leveugle

引用次数: 6

A unified sequential equivalence checking approach to verify high-level functionality and protocol specification implementations in RTL designs 统一的顺序等效检查方法，用于验证RTL设计中的高级功能和协议规范实现

2014 15th Latin American Test Workshop - LATW Pub Date : 2014-03-12 DOI: 10.1109/LATW.2014.6841905

Carlos Ivan Castro Marquez, M. Strum, J. Wang

引用次数: 4

Design of on-chip sensors to monitor electromagnetic activity in ICs: Towards on-line diagnosis and self-healing 集成电路中监测电磁活动的片上传感器的设计:走向在线诊断和自愈

2014 15th Latin American Test Workshop - LATW Pub Date : 2014-03-12 DOI: 10.1109/LATW.2014.6841898

S. Bendhia, A. Boyer

引用次数: 1

Reducing SEU sensitivity in LIN networks: Selective and collaborative hardening techniques 在LIN网络中降低SEU敏感性:选择性和协同硬化技术

2014 15th Latin American Test Workshop - LATW Pub Date : 2014-03-12 DOI: 10.1109/LATW.2014.6841924

A. Vaskova, A. Fabregat, M. Portela-García, M. García-Valderas, C. López-Ongil, M. Reorda

{"title":"Reducing SEU sensitivity in LIN networks: Selective and collaborative hardening techniques","authors":"A. Vaskova, A. Fabregat, M. Portela-García, M. García-Valderas, C. López-Ongil, M. Reorda","doi":"10.1109/LATW.2014.6841924","DOIUrl":"https://doi.org/10.1109/LATW.2014.6841924","url":null,"abstract":"Digital electronic systems in automotive applications are in charge of different tasks, ranging from very critical control functions (e.g., airbag, ABS, ESP) to comfort services (e.g., handling of mirrors, seats, windows, wipers). Hardening these systems involves suitably trading off cost and reliability. Due to standards and regulations in the area, the reliability of subsystems involved even in the least critical applications has to be evaluated, and in most cases hardening has to be performed with very low extra cost. In this work, two approaches are proposed for hardening the LIN bus, which implements a serial communication network typically used in low-throughput and low-cost sub-systems in automotive applications. First, critical elements in LIN nodes are identified and some techniques to harden them are proposed following a selective hardening approach. Secondly, collaborative hardening techniques are proposed for reducing global sensitivity in a LIN network built with commercial devices, trying to achieve a high degree of robustness in the network with low cost solutions. We report some experimental results allowing evaluating the hardware cost and the robustness of the proposed techniques.","PeriodicalId":305922,"journal":{"name":"2014 15th Latin American Test Workshop - LATW","volume":"2014 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-03-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121080627","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Improvement of a VCO concept for low energy particule detection and recognition 改进了用于低能粒子检测和识别的压控振荡器概念

2014 15th Latin American Test Workshop - LATW Pub Date : 2014-03-12 DOI: 10.1109/LATW.2014.6841918

K. Coulié-Castellani, W. Rahajandraibe, G. Micolau, H. Aziza, J. Portal

引用次数: 3

Design diversity redundancy with spatial-temporal voting applied to data acquisition systems 基于时空投票的分集冗余设计在数据采集系统中的应用

2014 15th Latin American Test Workshop - LATW Pub Date : 2014-03-12 DOI: 10.1109/LATW.2014.6841900

C. Chenet, A. J. C. Lanot, T. Balen

引用次数: 5

A novel control strategy for fail-safe cyclic data exchange in wireless sensor networks 无线传感器网络中故障安全循环数据交换的控制策略

2014 15th Latin American Test Workshop - LATW Pub Date : 2014-03-12 DOI: 10.1109/LATW.2014.6841911

P. Briff, A. Lutenberg, L. Vega, Fabian Vargas, M. Patwary

引用次数: 0

Specification test minimization for given defect level 针对给定的缺陷级别，规范测试最小化

2014 15th Latin American Test Workshop - LATW Pub Date : 2014-03-12 DOI: 10.1109/LATW.2014.6841927

S. Sindia, V. Agrawal

引用次数: 2