Optimized hybrid verification of embedded software

Abstract

The verification of embedded software has become an important subject over the last years. However, neither standalone verification approaches, like simulation-based or formal verification, nor state-of-the-art hybrid/semiformal verification approaches are able to verify large and complex embedded software with hardware dependencies. This work presents an optimized scalable hybrid verification approach for the verification of embedded software with hardware dependencies using a mixed bottom-up/top-down algorithm with optimized static parameter assignment (SPA). These algorithms and methodologies like SPA and counterexample guided simulation are used to combine simulation-based and formal verification in a new way. SPA offers a way to interact between dynamic and static verification approaches based on an automated ranking heuristic of possible function parameters according to the impact on the model size. Furthermore, SPA inserts initialization code for specific function parameters into the source code under test and supports model building and optimization algorithms to reduce the state space. We have successfully applied this optimized hybrid verification methodology to an embedded software application: Motorola's Powerstone Benchmark suite. The results show that our approach scales better than stand-alone software model checkers to reach deep state spaces.