2023 IEEE 5th International Conference on Artificial Intelligence Circuits and Systems (AICAS)最新文献_第3页

4b/4b/8b Precision Charge-Domain 8T-SRAM Based CiM for CNN Processing 基于4b/4b/8b精密电荷域8T-SRAM的CiM用于CNN处理

2023 IEEE 5th International Conference on Artificial Intelligence Circuits and Systems (AICAS) Pub Date : 2023-06-11 DOI: 10.1109/AICAS57966.2023.10168593

Qibang Zang, W. Goh, Y. Chong, A. Do

引用次数: 0

A Convolved Self-Attention Model for IMU-based Gait Detection and Human Activity Recognition 基于imu的步态检测和人体活动识别的卷积自注意模型

2023 IEEE 5th International Conference on Artificial Intelligence Circuits and Systems (AICAS) Pub Date : 2023-06-11 DOI: 10.1109/AICAS57966.2023.10168654

Shuailin Tao, W. Goh, Yuan Gao

引用次数: 0

TRIO: a Novel 10T Ternary SRAM Cell for Area-Efficient In-memory Computing of Ternary Neural Networks 一种用于三元神经网络区域高效内存计算的新型10T三元SRAM单元

2023 IEEE 5th International Conference on Artificial Intelligence Circuits and Systems (AICAS) Pub Date : 2023-06-11 DOI: 10.1109/AICAS57966.2023.10168596

Thanh-Dat Nguyen, Minh-Son Le, Thi-Nhan Pham, I. Chang

引用次数: 0

Deep Learning Compiler Optimization on Multi-Chiplet Architecture 基于多芯片架构的深度学习编译器优化

2023 IEEE 5th International Conference on Artificial Intelligence Circuits and Systems (AICAS) Pub Date : 2023-06-11 DOI: 10.1109/AICAS57966.2023.10168656

Huiqing Xu, Kuang Mao, Quihong Pan, Zhaorong Tang, Mengdi Wang, Ying Wang

引用次数: 0

Deep-learning-based X-ray CT Slice Analysis for Layout Verification in Printed Circuit Boards 基于深度学习的印刷电路板布局验证x射线CT切片分析

2023 IEEE 5th International Conference on Artificial Intelligence Circuits and Systems (AICAS) Pub Date : 2023-06-11 DOI: 10.1109/AICAS57966.2023.10168608

Deruo Cheng, Yiqiong Shi, Yee-Yang Tee, Jingsi Song, Xue Wang, B. Wen, B. Gwee

{"title":"Deep-learning-based X-ray CT Slice Analysis for Layout Verification in Printed Circuit Boards","authors":"Deruo Cheng, Yiqiong Shi, Yee-Yang Tee, Jingsi Song, Xue Wang, B. Wen, B. Gwee","doi":"10.1109/AICAS57966.2023.10168608","DOIUrl":"https://doi.org/10.1109/AICAS57966.2023.10168608","url":null,"abstract":"3D X-ray Computational Tomography (CT) systems have been employed to inspect Printed Circuit Boards (PCB) for security analysis, considering the heightened trustworthiness concern on the globalized supply chain. In this paper, we propose a deep-learning-based layout verification (DELVer) framework to automatically extract PCB layout information from X-ray CT slices and verify against the design files. Leveraging on geometrical projective transformation, our proposed DELVer framework aligns the acquired CT slice of each PCB layer with their corresponding design file, to train state-of-the-art deep learning models for layout extraction and verification. It thus alleviates the laborious manual data labeling for deep learning models. With a cross-device evaluation on 4 multi-layer satellite PCBs of board size around 90 cm2, our proposed DELVer framework demonstrates how deep learning models can generalize to unseen target PCBs for layout verification, establishing an efficient solution for PCB assurance and industrial failure analysis.","PeriodicalId":296649,"journal":{"name":"2023 IEEE 5th International Conference on Artificial Intelligence Circuits and Systems (AICAS)","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116541201","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Efficient Algorithms for Accelerating Spiking Neural Networks on MAC Array of SpiNNaker 2 SpiNNaker MAC阵列上加速尖峰神经网络的高效算法

2023 IEEE 5th International Conference on Artificial Intelligence Circuits and Systems (AICAS) Pub Date : 2023-06-11 DOI: 10.1109/AICAS57966.2023.10168559

Jiaxin Huang, Florian Kelber, B. Vogginger, Binyi Wu, Felix Kreutz, Pascal Gerhards, Daniel Scholz, Klaus Knobloch, C. Mayr

{"title":"Efficient Algorithms for Accelerating Spiking Neural Networks on MAC Array of SpiNNaker 2","authors":"Jiaxin Huang, Florian Kelber, B. Vogginger, Binyi Wu, Felix Kreutz, Pascal Gerhards, Daniel Scholz, Klaus Knobloch, C. Mayr","doi":"10.1109/AICAS57966.2023.10168559","DOIUrl":"https://doi.org/10.1109/AICAS57966.2023.10168559","url":null,"abstract":"The CPU-based system is widely used for simulating the brain-inspired spiking neural networks (SNN) by taking the benefit of flexibility, while processing high input spiking rates caused by immature coding mechanism costs many CPU cycles, and the introduction of additional information required by serial execution needs the time-consuming pre- and post-neuron matching algorithm. To address these issues, we propose an algorithm set leveraging the multiply-accumulate (MAC) array to accelerate the SNN inference. By rearranging and compressing operands losslessly, we retain the advantage of the MAC array on fast parallel computing, as well as alleviate the ineffective memory occupation and the waste of computing resources, which result from the inherent sparse feature of SNN and reluctant memory alignment from fixed MAC hardware structure. Benchmarking with an SNN radar gesture recognition model, the algorithms jointly optimize 82.71% of the execution time compared to the serial computation on the ARM M4F of the SpiNNaker 2 chip; 49.89% of the memory footprint is reduced contrasted with the unoptimized MAC calculation. This article explicitly expands the application field of the General Sparse Matrix-Matrix Multiplication (SpGEMM) issue to SNN, developing novel SpGEMM optimization algorithms fitting the SNN feature and MAC array.","PeriodicalId":296649,"journal":{"name":"2023 IEEE 5th International Conference on Artificial Intelligence Circuits and Systems (AICAS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121198381","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Live Demonstration: Real-time Analyses of Biosignals based on a Dedicated CMOS Configurable Deep Learning Engine 现场演示:基于专用CMOS可配置深度学习引擎的生物信号实时分析

2023 IEEE 5th International Conference on Artificial Intelligence Circuits and Systems (AICAS) Pub Date : 2023-06-11 DOI: 10.1109/AICAS57966.2023.10168631

Junzhe Wang, Shiqi Zhao, Chaoming Fang, Jie Yang, M. Sawan

引用次数: 0

Modified Logarithmic Multiplication Approximation for Machine Learning 机器学习的修正对数乘法近似

2023 IEEE 5th International Conference on Artificial Intelligence Circuits and Systems (AICAS) Pub Date : 2023-06-11 DOI: 10.1109/AICAS57966.2023.10168664

I. Kouretas, Vassilis Paliouras, T. Stouraitis

引用次数: 0

Energy Efficient Software-hardware Co-design of Quantized Recurrent Convolutional Neural Network for Continuous Cardiac Monitoring 用于心脏连续监测的量化循环卷积神经网络节能软硬件协同设计

2023 IEEE 5th International Conference on Artificial Intelligence Circuits and Systems (AICAS) Pub Date : 2023-06-11 DOI: 10.1109/AICAS57966.2023.10168601

Jinhai Hu, Cong Sheng Leow, W. Goh, Yuan Gao

{"title":"Energy Efficient Software-hardware Co-design of Quantized Recurrent Convolutional Neural Network for Continuous Cardiac Monitoring","authors":"Jinhai Hu, Cong Sheng Leow, W. Goh, Yuan Gao","doi":"10.1109/AICAS57966.2023.10168601","DOIUrl":"https://doi.org/10.1109/AICAS57966.2023.10168601","url":null,"abstract":"This paper presents an electrocardiogram (ECG) signal classification model based on Recurrent Convolutional Neural Network (RCNN). With recurrent connections and data buffers, a single convolutional layer is reused to implement multiple layers function. Using a 5-layers CNN network as an example, this approach reduces the number of parameters by more than 50% while achieving the same feature extraction size. Furthermore, quantized RCNN (QRCNN) is proposed where the input signal, interlayer output, and kernel weights are quantized to unsigned INT8, INT4, and signed INT4 respectively. For hardware implementation, pipelining and data reuse within the 1-D convolution kernel can potentially reduce latency. QRCNN model achieved 98.08% validation accuracy on MIT-BIH datasets with only 1% degradation due to quantization. The estimated dynamic power consumption of the QRCNN is less than 60% of a conventional quantized CNN when implemented on a Xilinx Artix-7 FPGA, showing the potential for resource-constraint edge devices.","PeriodicalId":296649,"journal":{"name":"2023 IEEE 5th International Conference on Artificial Intelligence Circuits and Systems (AICAS)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122393487","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Binary is All You Need: Ultra-Efficient Arrhythmia Detection with a Binary-Only Compressive System 二进制是所有你需要的:超高效的心律失常检测与二进制压缩系统

2023 IEEE 5th International Conference on Artificial Intelligence Circuits and Systems (AICAS) Pub Date : 2023-06-11 DOI: 10.1109/AICAS57966.2023.10168576

Fengshi Tian, Xiaomeng Wang, Jinbo Chen, Jie Yang, M. Sawan, C. Tsui, Kwang-Ting Cheng

{"title":"Binary is All You Need: Ultra-Efficient Arrhythmia Detection with a Binary-Only Compressive System","authors":"Fengshi Tian, Xiaomeng Wang, Jinbo Chen, Jie Yang, M. Sawan, C. Tsui, Kwang-Ting Cheng","doi":"10.1109/AICAS57966.2023.10168576","DOIUrl":"https://doi.org/10.1109/AICAS57966.2023.10168576","url":null,"abstract":"Detecting cardiac arrhythmia is critical for preventing heart attacks, and wearable electrocardiograph (ECG) systems have been developed to address this issue. However, the energy consumption of existing wearable systems is still significant at both the circuit and system levels, posing a challenge for their design. In this paper, we propose a novel ultra-efficient binary-only compressive ECG system for edge cardiac arrhythmia detection, featuring an event-driven level-crossing analog-to-spike converter (ATS) for sensing and a computing-in-memory (CIM) based binarized neural network (BNN) processor for compressive processing. Through system-level co-design, our proposed system achieves high arrhythmia detection accuracy and ultra-low energy consumption. Our simulations using the MIT-BIH dataset show that the proposed system achieves a 90.1% reduction in sampled data points compared to Nyquist sampling. Moreover, our dedicated BNN on a CIM engine delivers 97.03% arrhythmia detection accuracy with energy efficiency as low as 0.17uJ/inference.","PeriodicalId":296649,"journal":{"name":"2023 IEEE 5th International Conference on Artificial Intelligence Circuits and Systems (AICAS)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126436519","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0