{"title":"机器学习的修正对数乘法近似","authors":"I. Kouretas, Vassilis Paliouras, T. Stouraitis","doi":"10.1109/AICAS57966.2023.10168664","DOIUrl":null,"url":null,"abstract":"In this paper, a novel approximation that allows exploitation of the full potential of logarithmic multiplication is proposed. More specifically, the proposed approximation is quantified in terms of mean square error (MSE) and compared to a competitive recent publication. Subsequently, an LSTM network is used as an illustrative test case and the proposed approximation is validated in terms of the accuracy of the netowrk. It has been shown that for short data wordlengths, the proposed approximation can achieve small loss values, for the particular LSTM network. Finally, the circuit implementation of the logarithmic multiplier is synthesized in a 28 nm standard-cell library. Results show reduced hardware complexity for similar loss values on the specific LSTM network.","PeriodicalId":296649,"journal":{"name":"2023 IEEE 5th International Conference on Artificial Intelligence Circuits and Systems (AICAS)","volume":"67 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2023-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Modified Logarithmic Multiplication Approximation for Machine Learning\",\"authors\":\"I. Kouretas, Vassilis Paliouras, T. Stouraitis\",\"doi\":\"10.1109/AICAS57966.2023.10168664\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, a novel approximation that allows exploitation of the full potential of logarithmic multiplication is proposed. More specifically, the proposed approximation is quantified in terms of mean square error (MSE) and compared to a competitive recent publication. Subsequently, an LSTM network is used as an illustrative test case and the proposed approximation is validated in terms of the accuracy of the netowrk. It has been shown that for short data wordlengths, the proposed approximation can achieve small loss values, for the particular LSTM network. Finally, the circuit implementation of the logarithmic multiplier is synthesized in a 28 nm standard-cell library. Results show reduced hardware complexity for similar loss values on the specific LSTM network.\",\"PeriodicalId\":296649,\"journal\":{\"name\":\"2023 IEEE 5th International Conference on Artificial Intelligence Circuits and Systems (AICAS)\",\"volume\":\"67 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2023-06-11\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2023 IEEE 5th International Conference on Artificial Intelligence Circuits and Systems (AICAS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/AICAS57966.2023.10168664\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2023 IEEE 5th International Conference on Artificial Intelligence Circuits and Systems (AICAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/AICAS57966.2023.10168664","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Modified Logarithmic Multiplication Approximation for Machine Learning
In this paper, a novel approximation that allows exploitation of the full potential of logarithmic multiplication is proposed. More specifically, the proposed approximation is quantified in terms of mean square error (MSE) and compared to a competitive recent publication. Subsequently, an LSTM network is used as an illustrative test case and the proposed approximation is validated in terms of the accuracy of the netowrk. It has been shown that for short data wordlengths, the proposed approximation can achieve small loss values, for the particular LSTM network. Finally, the circuit implementation of the logarithmic multiplier is synthesized in a 28 nm standard-cell library. Results show reduced hardware complexity for similar loss values on the specific LSTM network.