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Proceedings of International Symposium on Semiconductor Manufacturing最新文献

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An efficient production method in a mixed product manufacturing 混合产品制造中的一种高效生产方法
Proceedings of International Symposium on Semiconductor Manufacturing Pub Date : 1995-09-17 DOI: 10.1109/ISSM.1995.524372
E. Ikemoto, K. Kinoshita, K. Nakagawa
{"title":"An efficient production method in a mixed product manufacturing","authors":"E. Ikemoto, K. Kinoshita, K. Nakagawa","doi":"10.1109/ISSM.1995.524372","DOIUrl":"https://doi.org/10.1109/ISSM.1995.524372","url":null,"abstract":"We have presented the method that can increase the productivity to the maximum point with the minimum plant investment in semiconductor factory and utilize the equipment in most efficient way at ISSM '94(P169-172). We explain the \"batch unit production system\" which is a more efficient production method in a mixed product manufacturing. Using this system, we achieved improvement for charge percentage of batch system equipment and operation and short TAT.","PeriodicalId":289961,"journal":{"name":"Proceedings of International Symposium on Semiconductor Manufacturing","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-09-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126452995","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Rapid failure analysis using contamination-defect-fault (CDF) simulation 基于污染-缺陷-故障(CDF)模拟的快速失效分析
Proceedings of International Symposium on Semiconductor Manufacturing Pub Date : 1995-09-17 DOI: 10.1109/ISSM.1995.524376
J. Khare, Wojciech Maly
{"title":"Rapid failure analysis using contamination-defect-fault (CDF) simulation","authors":"J. Khare, Wojciech Maly","doi":"10.1109/ISSM.1995.524376","DOIUrl":"https://doi.org/10.1109/ISSM.1995.524376","url":null,"abstract":"This paper describes a new methodology for rapid failure analysis. The methodology is based on the simulator CODEF, which is able to map the effects of contamination deposited on an IC during any stage of the manufacturing process, onto circuit-level faults. The utilization of such a capability in failure analysis is illustrated with examples.","PeriodicalId":289961,"journal":{"name":"Proceedings of International Symposium on Semiconductor Manufacturing","volume":"70 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-09-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131273109","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 11
Use of process flow in semiconductor manufacturing 流程在半导体制造中的应用
Proceedings of International Symposium on Semiconductor Manufacturing Pub Date : 1995-09-17 DOI: 10.1109/ISSM.1995.524403
E. Fukuda
{"title":"Use of process flow in semiconductor manufacturing","authors":"E. Fukuda","doi":"10.1109/ISSM.1995.524403","DOIUrl":"https://doi.org/10.1109/ISSM.1995.524403","url":null,"abstract":"Despite the usefulness in semiconductor manufacturing of various systems such as CIM and the Virtual Factory, process/device engineers must learn how to operate such systems, which is very time consuming. These concerns are due to differences in data format and difficulties in information exchange among systems. In next-generation device development, represented by the 1G DRAM, in order to achieve improvements in synthetic production efficiency, information standardization is needed. In particular, standardization of \"process flow\" is the most important factor in integrating various systems associated with semiconductor manufacturing. This paper describes a system which integrates various systems using standardized process flow data and five interface programs.","PeriodicalId":289961,"journal":{"name":"Proceedings of International Symposium on Semiconductor Manufacturing","volume":"64 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-09-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133814319","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A multi-pronged approach to defect management 缺陷管理的多管齐下的方法
Proceedings of International Symposium on Semiconductor Manufacturing Pub Date : 1995-09-17 DOI: 10.1109/ISSM.1995.524363
D. Paradis, R. Guldi, J. Lalena, J.W. Ritchison
{"title":"A multi-pronged approach to defect management","authors":"D. Paradis, R. Guldi, J. Lalena, J.W. Ritchison","doi":"10.1109/ISSM.1995.524363","DOIUrl":"https://doi.org/10.1109/ISSM.1995.524363","url":null,"abstract":"This paper describes a comprehensive, three pronged approach to defect management combining the elements of continuous in-line monitoring, yield loss quantification, and short loop analysis. In-line monitoring provides both a historical defect baseline and a trigger for initiating corrective action in the event of out-of-control situations. Yield loss quantification involving conventional bit mapping or bin mapping partitions the yield loss by defect type and process level. Loop monitors relate trouble spots to root causes, providing a continuous measure of the progress of process and equipment improvement programs.","PeriodicalId":289961,"journal":{"name":"Proceedings of International Symposium on Semiconductor Manufacturing","volume":"91 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-09-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134034503","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Application of surface photovoltage method to in-line monitoring of metallic contamination in a manufacturing environment 表面光电压法在制造环境金属污染在线监测中的应用
Proceedings of International Symposium on Semiconductor Manufacturing Pub Date : 1995-09-17 DOI: 10.1109/ISSM.1995.524361
K. Nakao, Y. Matsuda, Y. Inomaki, K. Mizukami, M. Enomoto
{"title":"Application of surface photovoltage method to in-line monitoring of metallic contamination in a manufacturing environment","authors":"K. Nakao, Y. Matsuda, Y. Inomaki, K. Mizukami, M. Enomoto","doi":"10.1109/ISSM.1995.524361","DOIUrl":"https://doi.org/10.1109/ISSM.1995.524361","url":null,"abstract":"We investigated the correlation between junction degradation of bipolar transistors and heavy metal contamination using the SPV (Surface Photovoltage) method, and found Fe contamination was the main cause of collector-emitter shorts. It was revealed that the source of Fe atoms was a contaminated Si/sub 3/N/sub 4/ film by using the SPV method to analyze contamination levels of equipment. In this regard, the SPV method has proven to be a highly efficient monitoring tool for heavy metal contamination in a manufacturing environment.","PeriodicalId":289961,"journal":{"name":"Proceedings of International Symposium on Semiconductor Manufacturing","volume":"61 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-09-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126203263","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Simulating AMHS performance for semiconductor wafer fabrication 模拟半导体晶圆制造中的AMHS性能
Proceedings of International Symposium on Semiconductor Manufacturing Pub Date : 1995-09-17 DOI: 10.1109/ISSM.1995.524382
N. Pierce, R. Stafford
{"title":"Simulating AMHS performance for semiconductor wafer fabrication","authors":"N. Pierce, R. Stafford","doi":"10.1109/ISSM.1995.524382","DOIUrl":"https://doi.org/10.1109/ISSM.1995.524382","url":null,"abstract":"This paper presents the methods and results of modeling and simulating the performance of interbay automated material-handling systems (AMHS) for semiconductor wafer fabrication. Along with a case study of a wafer fab AMHS model, this paper includes an alternate approach to modeling interbay arrivals and delays and explores periods of peak transport demands. A From:To matrix was developed from a detailed simulation model with process flows to represent the hourly demand of bay-to-bay movements. A second From:To matrix was generated to represent the mean transport time of automated material handling. We examine the effect that these matrices have on simulation output and model performance. Three distributions, Constant, Normal, and Exponential, were used with each table. The comparison between detailed and matrix input results included the mean and 95th percentile of delivery times and lot cycle time differentials, as well as car utilization and model execution time. The Exponential distribution provided results closest to those of the detailed model.","PeriodicalId":289961,"journal":{"name":"Proceedings of International Symposium on Semiconductor Manufacturing","volume":"49 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-09-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124393080","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
The influence of tungsten contamination on electrical characteristics of MOS devices in semiconductor processing 半导体加工中钨污染对MOS器件电学特性的影响
Proceedings of International Symposium on Semiconductor Manufacturing Pub Date : 1995-09-17 DOI: 10.1109/ISSM.1995.524375
H. Kawahara, K. Yoneda, H. Oishi, Y. Todokoro
{"title":"The influence of tungsten contamination on electrical characteristics of MOS devices in semiconductor processing","authors":"H. Kawahara, K. Yoneda, H. Oishi, Y. Todokoro","doi":"10.1109/ISSM.1995.524375","DOIUrl":"https://doi.org/10.1109/ISSM.1995.524375","url":null,"abstract":"The elimination of dedicated process equipment for silicide brings major benefits on equipment investment and pulsation-less production. To achieve the elimination of silicide dedicated process equipments, the influence and criteria of silicide-metal contamination on the electrical characteristics of ULSI MOS devices should be clarified. In this paper, we investigated the influence and criteria of W contamination on the dielectric breakdown reliability and P-N junction leakage current of MOS devices. In addition, feasibility study for common use of equipment such as furnace, wet cleaning, LP-CVD and plasma etcher is discussed.","PeriodicalId":289961,"journal":{"name":"Proceedings of International Symposium on Semiconductor Manufacturing","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-09-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121384926","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Control of Si surface characteristics by a new etching solution BHF/H/sub 2/O/sub 2/ 新型蚀刻液BHF/H/ sub2 /O/ sub2 /控制硅表面特性
Proceedings of International Symposium on Semiconductor Manufacturing Pub Date : 1995-09-17 DOI: 10.1109/ISSM.1995.524356
Y. Muramatsu, M. Tsuji, N. Aoto
{"title":"Control of Si surface characteristics by a new etching solution BHF/H/sub 2/O/sub 2/","authors":"Y. Muramatsu, M. Tsuji, N. Aoto","doi":"10.1109/ISSM.1995.524356","DOIUrl":"https://doi.org/10.1109/ISSM.1995.524356","url":null,"abstract":"We propose a new buffered hydrofluoric acid (BHF) based solution without surfactants, BHF/H/sub 2/O/sub 2/, for Si oxide etching. The BHF/H/sub 2/O/sub 2/ solution is an application of the FPM (hydrofluoric acid-hydrogen peroxide mixture) technique reported by Shimono and Tsuiji (1991). By using BHF/H/sub 2/O/sub 2/, low microroughness and high wettability to Si surfaces are achieved without adding any surfactants.","PeriodicalId":289961,"journal":{"name":"Proceedings of International Symposium on Semiconductor Manufacturing","volume":"98 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-09-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117133247","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Advanced water purification system for sub-half-micron devices 先进的亚半微米设备水净化系统
Proceedings of International Symposium on Semiconductor Manufacturing Pub Date : 1995-09-17 DOI: 10.1109/ISSM.1995.524410
C. Ban, K. Sato, M. Hirayama
{"title":"Advanced water purification system for sub-half-micron devices","authors":"C. Ban, K. Sato, M. Hirayama","doi":"10.1109/ISSM.1995.524410","DOIUrl":"https://doi.org/10.1109/ISSM.1995.524410","url":null,"abstract":"Summary form only given. Sub-half-micron devices have fine patterns and thin films. Therefore, the wafer surface is very sensitive to contamination. It is important to keep the wafer surface clean for producing high yield. Purified water plays a significant role in cleaning silicon wafers, because wafers are rinsed with water at the end of every process. So water, the final cleaning agent, has to be highly purified. In current water purifying systems, it is difficult to accomplish the water quality targets for sub-half-micron devices. We developed a new water purification system with three new technological innovations: the ion exchange resins capable of absorbing particles, the unit to ionize silicate impurities, and a two-stage vacuum tower. Optimal organization of these technologies makes it possible to achieve the highest purity with reduced cost. We present the technologies on effective removal of particles, efficient elimination of silicate impurities, and strict control of dissolved oxygen.","PeriodicalId":289961,"journal":{"name":"Proceedings of International Symposium on Semiconductor Manufacturing","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-09-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130087396","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Evaluation for fab performance using CPO 用CPO评价晶圆厂的性能
Proceedings of International Symposium on Semiconductor Manufacturing Pub Date : 1995-09-17 DOI: 10.1109/ISSM.1995.524401
Y. Ito, H. Ogawa, H. Tani
{"title":"Evaluation for fab performance using CPO","authors":"Y. Ito, H. Ogawa, H. Tani","doi":"10.1109/ISSM.1995.524401","DOIUrl":"https://doi.org/10.1109/ISSM.1995.524401","url":null,"abstract":"We have tried to evaluate the investment effect of a semiconductor device factory by grasping the process cost precisely, classifying its structure, and identifying useless cost factors. As an evaluation index we defined and used the CPO (Cost of Process Ownership), which is the cost per wafer in each process step based on the configuration of equipment installed in the factory and the configuration of product types manufactured there. This index was developed by making some improvements to the CEO (Cost of Equipment Ownership) model. We report the definition of the CPO we are using and some examples of CPO utilization.","PeriodicalId":289961,"journal":{"name":"Proceedings of International Symposium on Semiconductor Manufacturing","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-09-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117170017","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
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