IEEE Workshop on the Architecture and Implementation of High Performance Communication Subsystems最新文献

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Performance of Gigabit Atm Switch Designs 千兆Atm交换机设计的性能
M. Karol, K. Eng
{"title":"Performance of Gigabit Atm Switch Designs","authors":"M. Karol, K. Eng","doi":"10.1109/HPCS.1992.759228","DOIUrl":"https://doi.org/10.1109/HPCS.1992.759228","url":null,"abstract":"In this presentation, we discuss performance issues (delay, throughput, and cell loss) associated with gigabit-per-second ATM switch designs. Much of our attention focuses on the issue of hierarchical multiplexing in ATM switch design. As with circuit switches, the interface 1 data rates to the external lines (i.e., line card data rates) can be and usually are different from the internal core fabric speed of an ATM switch. To avoid a large delay penalty for the high speed interfaces, the internal core fabric speed needs to be at least as large as the maximum interface data rate. If the switch first demultiplexed a high-speed signal to multiple inputs of a \"low-speed core fabric (e.g., demultiplexed a 2.4-Cb/s signal to sixteen 150-Mb/s input lines), then the delay would be quite large (compared to using a 2.4-Gb/s core fabric) [1].","PeriodicalId":274790,"journal":{"name":"IEEE Workshop on the Architecture and Implementation of High Performance Communication Subsystems","volume":"74 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-02-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116019090","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Subcarrier Multiplexed Network (scm-Net) Architecture for Multigigabit/Second Heterogeneous Data Transmission 多千兆/秒异构数据传输的子载波复用网络(scm-Net)体系结构
A. Bugos, R. Olshansky
{"title":"A Subcarrier Multiplexed Network (scm-Net) Architecture for Multigigabit/Second Heterogeneous Data Transmission","authors":"A. Bugos, R. Olshansky","doi":"10.1109/HPCS.1992.759234","DOIUrl":"https://doi.org/10.1109/HPCS.1992.759234","url":null,"abstract":"The basic architecture of a multigigabit per second local area network which utilizes a subcarrier multiplexed optical carrier to provide multiple asynchronous information channels is described. The network is design for high-capacity transmission of data, voice, and video traffic simultaneously using variable-length datagrams, ATM-cells, and circuit-switched video. Multi-user access to the information channels is provided through a separate control channel which uses a simple \"token passing\" protocol. A significant advantage of the SCM-NET design is that medium-speed node controllers operating at roughly 25 MHz can efficiently control several gigabits of information per second through switched access to the various subcarrier multiplexed channels.","PeriodicalId":274790,"journal":{"name":"IEEE Workshop on the Architecture and Implementation of High Performance Communication Subsystems","volume":"60 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-02-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126685484","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Taking Advantage of ATM Technology in the Local Area Networks 在局域网中利用ATM技术
G. Shenoda
{"title":"Taking Advantage of ATM Technology in the Local Area Networks","authors":"G. Shenoda","doi":"10.1109/HPCS.1992.759256","DOIUrl":"https://doi.org/10.1109/HPCS.1992.759256","url":null,"abstract":"This paper briefly Introduces a generic wide area network architecture that most telecommunication carriers plan to implement based on the evolving ATM technology and related standards. The paper will illustrate that a similar architecture can be utilized to provide customer promises local area communication. The paper discusses examples of interfaces between Non-ATM equipment and the ATM network followed by examples of direct utilization of ATM technology. In the course of discussion, advantages of using ATM in the CPE will be pointed out. Although this written summary may not include details of performance and interface requirements, they will be discussed in the presentation during the conference.","PeriodicalId":274790,"journal":{"name":"IEEE Workshop on the Architecture and Implementation of High Performance Communication Subsystems","volume":"41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-02-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122777973","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Implementation and Performance of an Atm Host Interface for Workstations 工作站Atm主机接口的实现与性能
C. Brendan, S. Traw, Jonathan, M. Smith
{"title":"Implementation and Performance of an Atm Host Interface for Workstations","authors":"C. Brendan, S. Traw, Jonathan, M. Smith","doi":"10.1109/HPCS.1992.759217","DOIUrl":"https://doi.org/10.1109/HPCS.1992.759217","url":null,"abstract":"The brief paper outlines our strategies for providing a hardware and software solution to interfacing hosts to high-performance networks. Our prototype implementation connects an IBM RS/6000 to a SONET-based ATM network carrying data at the OC-3c rate of 155 Mbps. We have measured application-to-network data rates of up to 130 Mbps.","PeriodicalId":274790,"journal":{"name":"IEEE Workshop on the Architecture and Implementation of High Performance Communication Subsystems","volume":"39 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-02-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124152731","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 11
Real-time architecture for reed-solomon error correction reed-solomon纠错的实时架构
T. Brown, A. Collins, G. Grebowski, C. T. Dominy
{"title":"Real-time architecture for reed-solomon error correction","authors":"T. Brown, A. Collins, G. Grebowski, C. T. Dominy","doi":"10.1109/HPCS.1992.759252","DOIUrl":"https://doi.org/10.1109/HPCS.1992.759252","url":null,"abstract":"The Macintosh Telemetry and Command Workstation (MacTAC) was developed by Clemson University in cooperation with NASA's Gadded Space Flight Center to meet the needs of scientists requiring low-cost, high performance telemetry workstations. Among its many functions, the MacTAC system employs Reed Solomon(255,223) error correction as recommended by the Consultative Committee for Space Data Systems (CCSDS) [1] in a pipelined hardware platform. Presented here is an improved Reed-Solomon (RS) architecture to provide real time correction of CCSDS frames at a sustained rate of 5 megabits per second (Mbps).","PeriodicalId":274790,"journal":{"name":"IEEE Workshop on the Architecture and Implementation of High Performance Communication Subsystems","volume":"100 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-02-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125704113","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
PROCOM: a manager for an efficient transport system PROCOM:高效运输系统的管理者
B. Stiller
{"title":"PROCOM: a manager for an efficient transport system","authors":"B. Stiller","doi":"10.1109/HPCS.1992.759123","DOIUrl":"https://doi.org/10.1109/HPCS.1992.759123","url":null,"abstract":"The problem of processing packets in a communication node occurred due to the introduction of fiber optics as transmission medium, because the data rates increased drastically but the processing power did not increase in the same order of magnitude. For that reason, it is important to defuse the processing bottleneck of communication controllers and transport systems in general. Different approaches have been pursued in the research of high speed communications. This paper presents the architecture of an efficient transport system supported by a developed concept called Protocol Configuration Manager (PROCOM). This mechanism allows the dynamical adaptation of the running protocol stack on explicitly requested application requirements.","PeriodicalId":274790,"journal":{"name":"IEEE Workshop on the Architecture and Implementation of High Performance Communication Subsystems","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-02-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123957776","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 10
Very High Speed Lans for Medical Imaging 用于医学成像的超高速局域网
Y. Alsafadi, K. McNeill, R. Martinez
{"title":"Very High Speed Lans for Medical Imaging","authors":"Y. Alsafadi, K. McNeill, R. Martinez","doi":"10.1109/HPCS.1992.759213","DOIUrl":"https://doi.org/10.1109/HPCS.1992.759213","url":null,"abstract":"This report addresses issues we faxed in our on going work at the Radiology Research Laboratory. These issues are related to communication protocols for very high speed local area networks in a medical imaging environment. In this report we describe the characteristic of the application, solutions utilized in coupling between host system and the network, and protocol design.","PeriodicalId":274790,"journal":{"name":"IEEE Workshop on the Architecture and Implementation of High Performance Communication Subsystems","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-02-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129796932","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Los Alamos Multiple Crossbar Network Crossbar Interfaces 洛斯阿拉莫斯多交叉栏网络交叉栏接口
R. Thomson
{"title":"Los Alamos Multiple Crossbar Network Crossbar Interfaces","authors":"R. Thomson","doi":"10.1109/HPCS.1992.759224","DOIUrl":"https://doi.org/10.1109/HPCS.1992.759224","url":null,"abstract":"Los Alamos National Laboratory is investigating a network to replace the current Integrated Computing Network (ICN). This new network is composed of crossbar switching nodes called CP*s and host computers connected together with HIPPI links. The links and switches are controlled by Crossbar Interfaces, which do the network routing and security. The project was driven by a need to provide graphics data at movie rates across a network from a supercomputer to a scientific workstation, and also vastly increases the rate at which supercomputers communicate with each other. The components of the network are described.","PeriodicalId":274790,"journal":{"name":"IEEE Workshop on the Architecture and Implementation of High Performance Communication Subsystems","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-02-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134566780","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
An Atm Network Interface for High-Speed Experimentation 用于高速实验的Atm网络接口
Bruce S. Davie
{"title":"An Atm Network Interface for High-Speed Experimentation","authors":"Bruce S. Davie","doi":"10.1109/HPCS.1992.759220","DOIUrl":"https://doi.org/10.1109/HPCS.1992.759220","url":null,"abstract":"To connect host computers to an Asynchronous Transfer Mode (ATM) network, a network interface is required. The interface must be able to move data between the network and the host and to convert between the data format used in the network (ATM cells) and that used in the host (eg. variable length protocol data units). In the work described here, the goal was to prototype such an interface and to satisfy two contradictory requirements: speed of operation and flexibility to support experimentation. To achieve this goal, we defined an architecture which uses microprocessors for those functions where most flexibility is required, such as the execution of Segmentation and Reassembly (SAR) algorithms, while more specialized hardware is used for critical high-speed functions such as data movement and formatting of ATM cells. The details of this architecture are described and the results that have been obtained so far with the experimental prototype implementation are presented.","PeriodicalId":274790,"journal":{"name":"IEEE Workshop on the Architecture and Implementation of High Performance Communication Subsystems","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-02-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132122255","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
Def-Net: A Deflection Network Prototype Def-Net:一个偏转网络原型
G. Alberteago, P. Civera, R. Lo Cigno, G. Panizzardi, M. Zarnboni
{"title":"Def-Net: A Deflection Network Prototype","authors":"G. Alberteago, P. Civera, R. Lo Cigno, G. Panizzardi, M. Zarnboni","doi":"10.1109/HPCS.1992.759227","DOIUrl":"https://doi.org/10.1109/HPCS.1992.759227","url":null,"abstract":"The laboratory prototype of a Deflection Network, or De f-Net, and the structure of its nodes, based on a custom VLSI chip and a microcontroller, are described. We show that such a network can be implemented using commercially available devices, at reasonable cost. Finally, a possible application of the network is proposed.","PeriodicalId":274790,"journal":{"name":"IEEE Workshop on the Architecture and Implementation of High Performance Communication Subsystems","volume":"71 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-02-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121619481","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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