G. Alberteago, P. Civera, R. Lo Cigno, G. Panizzardi, M. Zarnboni
{"title":"Def-Net:一个偏转网络原型","authors":"G. Alberteago, P. Civera, R. Lo Cigno, G. Panizzardi, M. Zarnboni","doi":"10.1109/HPCS.1992.759227","DOIUrl":null,"url":null,"abstract":"The laboratory prototype of a Deflection Network, or De f-Net, and the structure of its nodes, based on a custom VLSI chip and a microcontroller, are described. We show that such a network can be implemented using commercially available devices, at reasonable cost. Finally, a possible application of the network is proposed.","PeriodicalId":274790,"journal":{"name":"IEEE Workshop on the Architecture and Implementation of High Performance Communication Subsystems","volume":"71 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1992-02-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Def-Net: A Deflection Network Prototype\",\"authors\":\"G. Alberteago, P. Civera, R. Lo Cigno, G. Panizzardi, M. Zarnboni\",\"doi\":\"10.1109/HPCS.1992.759227\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The laboratory prototype of a Deflection Network, or De f-Net, and the structure of its nodes, based on a custom VLSI chip and a microcontroller, are described. We show that such a network can be implemented using commercially available devices, at reasonable cost. Finally, a possible application of the network is proposed.\",\"PeriodicalId\":274790,\"journal\":{\"name\":\"IEEE Workshop on the Architecture and Implementation of High Performance Communication Subsystems\",\"volume\":\"71 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1992-02-17\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Workshop on the Architecture and Implementation of High Performance Communication Subsystems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/HPCS.1992.759227\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Workshop on the Architecture and Implementation of High Performance Communication Subsystems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/HPCS.1992.759227","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
The laboratory prototype of a Deflection Network, or De f-Net, and the structure of its nodes, based on a custom VLSI chip and a microcontroller, are described. We show that such a network can be implemented using commercially available devices, at reasonable cost. Finally, a possible application of the network is proposed.