Proceedings Fourth IEEE International Workshop on Computer Architecture for Machine Perception. CAMP'97最新文献

A parallelizing method for implementing image processing tasks on SIMD linear processor arrays 一种在SIMD线性处理器阵列上实现图像处理任务的并行化方法

Proceedings Fourth IEEE International Workshop on Computer Architecture for Machine Perception. CAMP'97 Pub Date : 1997-10-20 DOI: 10.1109/CAMP.1997.631944

S. Kyo, S. Okazaki, Y. Fujita, N. Yamashita

引用次数: 10

Three dimensional graphics algorithms on the Micro-Grain Array Processor. II 微颗粒阵列处理器上的三维图形算法。2

Proceedings Fourth IEEE International Workshop on Computer Architecture for Machine Perception. CAMP'97 Pub Date : 1997-10-20 DOI: 10.1109/CAMP.1997.632000

B. Bishop, Yan Zhang, K. Acken, M. J. Irwin, R. Owens

引用次数: 5

FPGA-based computing in computer vision 基于fpga的计算机视觉计算

Proceedings Fourth IEEE International Workshop on Computer Architecture for Machine Perception. CAMP'97 Pub Date : 1997-10-20 DOI: 10.1109/CAMP.1997.631921

N. Ratha, A. K. Jain

{"title":"FPGA-based computing in computer vision","authors":"N. Ratha, A. K. Jain","doi":"10.1109/CAMP.1997.631921","DOIUrl":"https://doi.org/10.1109/CAMP.1997.631921","url":null,"abstract":"Algorithms in computer vision are characterized by (i) complex and repetitive operations; (ii) large amount of data and (iii) a variety of data interaction (e.g., point operations, neighborhood operations, global operations). Based on the computation and communication complexity, vision algorithms have been characterized into three categories: (i) low-level, (ii) intermediate-level and (iii) high-level. In this paper, we describe the usage of custom computing approach to meet the computation and communication needs of computer vision algorithms. By customizing hardware architecture for every application at the instruction level, the optimal grain size needed for the problem at hand and the instruction granularity can be matched. Field Programmable Gate Array (FPGA) based processing elements (PEs) are being used to provide this facility. Using programmable communication resources, the diverse communication requirements can be met. A vision system needs to integrate hardware for the three levels. A custom computing approach alleviates the problem of achieving optimal granularity for different stages as the same hardware gets reconfigured at a software level for different levels of the application. We demonstrate the advantages of our approach using Splash 2-a Xilinx 4010-based custom computer.","PeriodicalId":274177,"journal":{"name":"Proceedings Fourth IEEE International Workshop on Computer Architecture for Machine Perception. CAMP'97","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-10-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128232239","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 25

Real-time hierarchical visual tracking using a configurable computing machine 使用可配置计算机的实时分层视觉跟踪

Proceedings Fourth IEEE International Workshop on Computer Architecture for Machine Perception. CAMP'97 Pub Date : 1997-10-20 DOI: 10.1109/CAMP.1997.631931

B. Pudipeddi, A. L. Abbott, P. Athanas

{"title":"Real-time hierarchical visual tracking using a configurable computing machine","authors":"B. Pudipeddi, A. L. Abbott, P. Athanas","doi":"10.1109/CAMP.1997.631931","DOIUrl":"https://doi.org/10.1109/CAMP.1997.631931","url":null,"abstract":"This paper describes a custom computing approach to real-time visual tracking. Traditionally, tracking systems require dedicated hardware to accommodate the computational demands and input/output rates imposed by real-time video sources. A radical alternative is represented by custom computing machines such as Splash 2, which use interconnected Field-Programmable Gate Arrays (FPGAs) to provide fine-grain parallelism and reconfigurability so that high-speed performance is possible for many different applications. The efficacy of such architectures to image-based computing is illustrated here through the implementation of a tracking system that consists of two parts: a Gaussian pyramid generator and a correlation-based tracker. The pyramid generator converts each input image to a hierarchy of images, each representing the original image at a different resolution. An object is tracked on successive frames by a coarse-to-fine search through this image hierarchy, using the sum of absolute differences as the matching criterion. Splash 2 performs these operations at rates of 15 or 30 frames per second. Its performance therefore rivals that of application-specific systems, although the architecture is inherently general-purpose in nature.","PeriodicalId":274177,"journal":{"name":"Proceedings Fourth IEEE International Workshop on Computer Architecture for Machine Perception. CAMP'97","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-10-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129356923","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 4

Hardware-software aspects of shift-register based NEWS networks for the focal plane 基于移位寄存器的焦平面新闻网络的硬件软件方面

Proceedings Fourth IEEE International Workshop on Computer Architecture for Machine Perception. CAMP'97 Pub Date : 1997-10-20 DOI: 10.1109/CAMP.1997.631904

R. Nguyen, D. Mercier, A. Jullian, T. Bernard

引用次数: 6

Investigating real-time validation of real-time image processing ASICs 研究实时图像处理asic的实时验证

Proceedings Fourth IEEE International Workshop on Computer Architecture for Machine Perception. CAMP'97 Pub Date : 1997-10-20 DOI: 10.1109/CAMP.1997.631914

I. Kraljic, F. Verdier, G. Quénot, B. Zavidovique

引用次数: 2

Vision chip architecture using general-purpose processing elements for 1 ms vision system 采用通用处理元件的视觉芯片架构，用于1ms视觉系统

Proceedings Fourth IEEE International Workshop on Computer Architecture for Machine Perception. CAMP'97 Pub Date : 1997-10-20 DOI: 10.1109/CAMP.1997.632052

T. Komuro, I. Ishii, M. Ishikawa

引用次数: 58

The CC/IPP, an MIMD-SIMD architecture for image processing and pattern recognition CC/IPP，一种用于图像处理和模式识别的MIMD-SIMD体系结构

Proceedings Fourth IEEE International Workshop on Computer Architecture for Machine Perception. CAMP'97 Pub Date : 1997-10-20 DOI: 10.1109/CAMP.1997.631887

P. Jonker, J. Vogelbruch

引用次数: 10

Processor/memory/array size tradeoffs in the design of SIMD arrays for a spatially mapped workload 为空间映射工作负载设计SIMD阵列时处理器/内存/阵列大小的权衡

Proceedings Fourth IEEE International Workshop on Computer Architecture for Machine Perception. CAMP'97 Pub Date : 1997-10-20 DOI: 10.1109/CAMP.1997.631884

M. Herbordt, A. Anand, O. Kidwai, R. Sam, C. Weems

引用次数: 10

External loop unrolling of image processing programs: optimal register allocation for RISC architectures 图像处理程序的外部循环展开:RISC体系结构的最佳寄存器分配

Proceedings Fourth IEEE International Workshop on Computer Architecture for Machine Perception. CAMP'97 Pub Date : 1997-10-20 DOI: 10.1109/CAMP.1997.631891

N. Zingirian, M. Maresca

引用次数: 2