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Proceedings Fourth IEEE International Workshop on Computer Architecture for Machine Perception. CAMP'97最新文献

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Context: a new paradigm to control distributed perceptual systems 上下文:控制分布式感知系统的新范式
Proceedings Fourth IEEE International Workshop on Computer Architecture for Machine Perception. CAMP'97 Pub Date : 1997-10-20 DOI: 10.1109/CAMP.1997.631941
V. di Gesú, F. Isgrò
{"title":"Context: a new paradigm to control distributed perceptual systems","authors":"V. di Gesú, F. Isgrò","doi":"10.1109/CAMP.1997.631941","DOIUrl":"https://doi.org/10.1109/CAMP.1997.631941","url":null,"abstract":"This paper deals with problems of representation and handling of concurrent processes in multiprocessor machines or in distributed and co-operating systems oriented to image analysis. For this purpose a new synchronization mechanism, named context is presented. Contexts are introduced as object variables in pictorial languages to represent distributed computation on spatial data. In particular, details of its implementation on the PIctorial C Language (PICL) are given.","PeriodicalId":274177,"journal":{"name":"Proceedings Fourth IEEE International Workshop on Computer Architecture for Machine Perception. CAMP'97","volume":"47 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-10-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125752778","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Image processing in a tree of peano coded images 图像处理在一个树的豌豆编码图像
Proceedings Fourth IEEE International Workshop on Computer Architecture for Machine Perception. CAMP'97 Pub Date : 1997-10-20 DOI: 10.1109/CAMP.1997.632021
G. Seetharaman, B. Zavidovique
{"title":"Image processing in a tree of peano coded images","authors":"G. Seetharaman, B. Zavidovique","doi":"10.1109/CAMP.1997.632021","DOIUrl":"https://doi.org/10.1109/CAMP.1997.632021","url":null,"abstract":"The authors investigate some attractive features of the 1-D sequence of pixels produced by the peano traversal of an image. They introduce two new hardware operations called bit-spreaded-meshing and its inverse brit-collation to produce and invert the sequence in real-time. A compact binary tree built using this sequence at its base implicitly contains the well known quadtree of the image also. The binary tree representation supports efficient design and implementation of divide and conquer algorithms. Its construction is readily extendable to higher dimensional images. They present a global optimization algorithm for image segmentation whose design is based on the binary tree. It produces a minimal cutset of homogeneous nodes in the tree using a dynamic programming technique. The experimental results assert the merit of the binary tree based implementation compared to its counterpart the quadtree.","PeriodicalId":274177,"journal":{"name":"Proceedings Fourth IEEE International Workshop on Computer Architecture for Machine Perception. CAMP'97","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-10-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129871914","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 16
Hough transform implementation on a reconfigurable highly parallel architecture Hough变换在可重构的高度并行架构上的实现
Proceedings Fourth IEEE International Workshop on Computer Architecture for Machine Perception. CAMP'97 Pub Date : 1997-10-20 DOI: 10.1109/CAMP.1997.631947
M. Mahmoud, M. Nakanishi, Takeshi Ogura
{"title":"Hough transform implementation on a reconfigurable highly parallel architecture","authors":"M. Mahmoud, M. Nakanishi, Takeshi Ogura","doi":"10.1109/CAMP.1997.631947","DOIUrl":"https://doi.org/10.1109/CAMP.1997.631947","url":null,"abstract":"A highly parallel hardware architecture for Hough Transform (HT)-based parametric curve and end-points extraction is described. It's based on CAM (Content Addressable Memory) concept. Through using advanced VLSI technology, to classical CAM implementations, three main features are provided: Parallel write, parallel search and single/multi hit response flag. Moreover the high number of CAM words available per chip synchronized with a high frequency clock has the merit to keep low both the hardware amount and the execution time, while featuring the ability to extract efficiently curve parameters and their corresponding end-points. To evaluate its performance, experimental results for segment extraction are presented: By using two CAM chips, segment extraction of an image 256/spl times/256 is achieved in real-time.","PeriodicalId":274177,"journal":{"name":"Proceedings Fourth IEEE International Workshop on Computer Architecture for Machine Perception. CAMP'97","volume":"243 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-10-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131897993","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 29
Multilayer perceptrons on Splash 2 Splash 2上的多层感知器
Proceedings Fourth IEEE International Workshop on Computer Architecture for Machine Perception. CAMP'97 Pub Date : 1997-10-20 DOI: 10.1109/CAMP.1997.631926
N. Ratha, Anil K. Jain
{"title":"Multilayer perceptrons on Splash 2","authors":"N. Ratha, Anil K. Jain","doi":"10.1109/CAMP.1997.631926","DOIUrl":"https://doi.org/10.1109/CAMP.1997.631926","url":null,"abstract":"Multilayer perceptrons (MLPs) are one of the most popular neural network models for solving pattern classification and image classification problems. Because of their ability to learn complex decision boundaries, MLPs are used in many practical computer vision applications involving classification (or supervised segmentation). Once the connection weights in a MLP have been learnt, the network can be used repeatedly for classification of new input patterns. Several special-purpose architectures have been described in the literature for neural networks as they are slow on a conventional uniprocessor. In this paper, we describe mapping of MLPs onto Splash 2-a \"custom computing machine\". The main features of the proposed mapping are: (i) the number of nodes in a layer is not fixed; (ii) the number of layers in the network is not fixed; (iii) it is based on a set of reprogrammable FPGAs and a programmable crossbar; and (iv) it has a significant speedup over a uniprocessor. The mapping has been used for implementing a 3-layer MLP for page segmentation application with an appreciable speedup of approximately 150 over a SPARCstation 20 for one million pattern vectors with 20 features per pattern.","PeriodicalId":274177,"journal":{"name":"Proceedings Fourth IEEE International Workshop on Computer Architecture for Machine Perception. CAMP'97","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-10-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133612902","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
The C/spl par/ data parallel language on a shared memory multiprocessor 共享内存多处理器上的C/spl par/ data并行语言
Proceedings Fourth IEEE International Workshop on Computer Architecture for Machine Perception. CAMP'97 Pub Date : 1997-10-20 DOI: 10.1109/CAMP.1997.631889
A. Fatni, D. Houzet, J. Basille
{"title":"The C/spl par/ data parallel language on a shared memory multiprocessor","authors":"A. Fatni, D. Houzet, J. Basille","doi":"10.1109/CAMP.1997.631889","DOIUrl":"https://doi.org/10.1109/CAMP.1997.631889","url":null,"abstract":"The image processing applications require both computing and input/output power. The GFLOPS project's aim is to develop a parallel architecture as well as its software environment to implement those applications efficiently. This goal can be achieved only with a real collaboration among the architecture, the compiler and the programming language. This paper investigates the C/spl par/ on global address space architectures. The main advantage of our paradigm is that it allows a unique framework to express both data and control parallelism. We will first present the structure of the GFLOPS machine used to implement this language. The C/spl par/ parallel language will be presented in the next section, and finally we will evaluate the effectiveness of the mechanisms incorporated in the architecture to implement the high level C/spl par/ structures.","PeriodicalId":274177,"journal":{"name":"Proceedings Fourth IEEE International Workshop on Computer Architecture for Machine Perception. CAMP'97","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-10-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130725965","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
An interactive tool for C.V. tutorials 简历教程的交互式工具
Proceedings Fourth IEEE International Workshop on Computer Architecture for Machine Perception. CAMP'97 Pub Date : 1997-10-20 DOI: 10.1109/CAMP.1997.631937
A. Biancardi, V. Cantoni, D. Codega, M. Pini
{"title":"An interactive tool for C.V. tutorials","authors":"A. Biancardi, V. Cantoni, D. Codega, M. Pini","doi":"10.1109/CAMP.1997.631937","DOIUrl":"https://doi.org/10.1109/CAMP.1997.631937","url":null,"abstract":"This work proposes TuLIP: a tool for the creation and fruition of tutorials on image processing and analysis. TuLIP is built around the idea that code in a very high level language can work both as as the way of performing a task and as the reference of the task it implements. TuLIP supports users and authors with tailored working modalities and supplies an interactive environment leading to practical experimentation thanks to the built-in interpreter and a set of object visualization libraries.","PeriodicalId":274177,"journal":{"name":"Proceedings Fourth IEEE International Workshop on Computer Architecture for Machine Perception. CAMP'97","volume":"367 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-10-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114127069","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A 10 GIPS SIMD processor for PC-based real time vision applications -architecture, algorithm implementation and language support 一种用于pc实时视觉应用的10gips SIMD处理器——体系结构、算法实现和语言支持
Proceedings Fourth IEEE International Workshop on Computer Architecture for Machine Perception. CAMP'97 Pub Date : 1997-10-20 DOI: 10.1109/CAMP.1997.631885
Y. Fujita, S. Kyo, N. Yamashita, S. Okazaki
{"title":"A 10 GIPS SIMD processor for PC-based real time vision applications -architecture, algorithm implementation and language support","authors":"Y. Fujita, S. Kyo, N. Yamashita, S. Okazaki","doi":"10.1109/CAMP.1997.631885","DOIUrl":"https://doi.org/10.1109/CAMP.1997.631885","url":null,"abstract":"This paper describes hardware implementation and software environment of a one-dimensional SIMD processor, IMAP-VISION. IMAP-VISION board is a single-slot PCI-bus board designed for PC-based real-time vision applications. The SIMD processor consists of 256 8-bit linear processor array and has 10.24 GIPS peak performance. In this paper, some detailed algorithm implementations, those which make use of IMAP-VISION special functions; are described, as well as IMAP-VISION architecture, hardware implementation, performance figures and software environment including high-level language 1DC and graphical user interface.","PeriodicalId":274177,"journal":{"name":"Proceedings Fourth IEEE International Workshop on Computer Architecture for Machine Perception. CAMP'97","volume":"59 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-10-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132186897","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 35
DAISY: a distributed architecture for intelligent system DAISY:智能系统的分布式架构
Proceedings Fourth IEEE International Workshop on Computer Architecture for Machine Perception. CAMP'97 Pub Date : 1997-10-20 DOI: 10.1109/CAMP.1997.631888
A. Chella, V. di Gesú, G. Gerardi, Ignazio Infantino, D. Intravaia, B. Lenzitti, G. Lo Bosco, A. Messina, R. Pirrone, P. Storniolo
{"title":"DAISY: a distributed architecture for intelligent system","authors":"A. Chella, V. di Gesú, G. Gerardi, Ignazio Infantino, D. Intravaia, B. Lenzitti, G. Lo Bosco, A. Messina, R. Pirrone, P. Storniolo","doi":"10.1109/CAMP.1997.631888","DOIUrl":"https://doi.org/10.1109/CAMP.1997.631888","url":null,"abstract":"Distributed perceptual systems are endowed with different kind of sensors, from which information flows to suitable modules to perform useful elaborations for decisions making. In this paper a new distributed architecture, named \"Distributed Architecture for Intelligent SYstem\" (DAISY), is proposed. It is based on the concept of co-operating behavioral agents supervised by a \"Central Engagement Module\". This module integrates the processing of data coming from the behavioral agents with a symbolic level of representation, by the introduction of a \"conceptual space\" intermediate analogue representation. The DAISY project is under development; experiments on navigation and exploration for an autonomous robot are done to evaluate its performance.","PeriodicalId":274177,"journal":{"name":"Proceedings Fourth IEEE International Workshop on Computer Architecture for Machine Perception. CAMP'97","volume":"367 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-10-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130563440","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 10
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