发布求助
文献互助 智能选刊 最新文献

2007 IEEE International Symposium on Circuits and Systems最新文献

筛选
英文 中文
Active Visual Tracking of Heading Direction By Combining Motion Energy Neurons 结合运动能量神经元的航向主动视觉跟踪
2007 IEEE International Symposium on Circuits and Systems Pub Date : 2007-05-27 DOI: 10.1109/ISCAS.2007.378104
Stanley Y. M. Lam, Bertram E. Shi
{"title":"Active Visual Tracking of Heading Direction By Combining Motion Energy Neurons","authors":"Stanley Y. M. Lam, Bertram E. Shi","doi":"10.1109/ISCAS.2007.378104","DOIUrl":"https://doi.org/10.1109/ISCAS.2007.378104","url":null,"abstract":"We describe a robotic vision system that aligns a camera's optical axis with its direction of translation by estimating the focus of expansion. Visual processing is based on functional models of populations of neurons in cortical areas VI through MST. Populations of motion energy neurons tuned to different orientations, positions and directions of motion are successively transformed into a population of neurons that collectively encode the focus of expansion at 25 frames per second. We characterize the performance of the system translating through a cluttered environment, and show that the performance is robust to variations in system parameters.","PeriodicalId":274010,"journal":{"name":"2007 IEEE International Symposium on Circuits and Systems","volume":"40 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123006543","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Miniaturized Delay Line based on Slow-Wave Substrates 基于慢波基板的小型化延迟线
2007 IEEE International Symposium on Circuits and Systems Pub Date : 2007-05-27 DOI: 10.1109/ISCAS.2007.378466
T. Prodromakis, C. Papavassiliou, G. Konstantinidis
{"title":"A Miniaturized Delay Line based on Slow-Wave Substrates","authors":"T. Prodromakis, C. Papavassiliou, G. Konstantinidis","doi":"10.1109/ISCAS.2007.378466","DOIUrl":"https://doi.org/10.1109/ISCAS.2007.378466","url":null,"abstract":"The paper proposed miniaturized delay lines on layered synthetic substrate materials which support slow-electromagnetic propagation. Under certain conditions such substrates mimic materials with ultra-high electric permittivity. The proposed structure is easily fabricated and a miniaturization factor of two orders of magnitude is reported. Theoretical and experimental results are in good agreement.","PeriodicalId":274010,"journal":{"name":"2007 IEEE International Symposium on Circuits and Systems","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114404235","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
New Spatially Adaptive Wavelet-based Method for the Despeckling of Medical Ultrasound Images 基于空间自适应小波的医学超声图像去斑新方法
2007 IEEE International Symposium on Circuits and Systems Pub Date : 2007-05-27 DOI: 10.1109/ISCAS.2007.378859
M. Bhuiyan, M. Omair Ahmad, M. Swamy
{"title":"New Spatially Adaptive Wavelet-based Method for the Despeckling of Medical Ultrasound Images","authors":"M. Bhuiyan, M. Omair Ahmad, M. Swamy","doi":"10.1109/ISCAS.2007.378859","DOIUrl":"https://doi.org/10.1109/ISCAS.2007.378859","url":null,"abstract":"Medical ultrasound images are widely used for diagnostic purposes. A major problem regarding these images is in their inherent corruption by speckle noise in a multiplicative fashion. The presence of speckle noise severely hampers the interpretation and analysis of medical ultrasound images. This paper presents a fast and reliable wavelet-based method for reducing the speckle in medical ultrasound images. A wavelet-based Bayesian maximum a posteriori denoiser is developed in a homomorphic framework. The wavelet coefficients of the log-transformed signal are modelled by a conditional Gaussian distribution, whereas those of the log-transformed speckle with a Maxwell distribution. The signal variances are obtained by using the local neighbors thus, making the method spatially adaptive. Simulations are performed using synthetically speckled and real ultrasound images. The results show that the proposed method can perform better than some of the existing methods in terms of the signal-to-noise ratio. Furthermore, the proposed method is fast, and preserves diagnostically important details.","PeriodicalId":274010,"journal":{"name":"2007 IEEE International Symposium on Circuits and Systems","volume":"278 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114486426","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 35
Vertically-Integrated Three-Dimensional SOI Photodetectors 垂直集成三维SOI光电探测器
2007 IEEE International Symposium on Circuits and Systems Pub Date : 2007-05-27 DOI: 10.1109/ISCAS.2007.378746
E. Culurciello, P. Weerakoon
{"title":"Vertically-Integrated Three-Dimensional SOI Photodetectors","authors":"E. Culurciello, P. Weerakoon","doi":"10.1109/ISCAS.2007.378746","DOIUrl":"https://doi.org/10.1109/ISCAS.2007.378746","url":null,"abstract":"We report on the design and measurement results of three-dimensional (3D) photo-detectors in a 0.18mum silicon-on-insulator technology. The photodiodes respond to light in the range of l-200,000lux with currents of 2fA to 300pA and can be arranged in a 3D stack. The phototransistors respond to light intensities of 5-200,000lux with currents from 50fA to 2.3muA. We also report spectral data obtained from the photodiode and show that a photodiode stack can be used to extract color information without the use of color filters. The data in this paper is essential to the design of advanced imaging arrays and color sensors in 3D SOI processes.","PeriodicalId":274010,"journal":{"name":"2007 IEEE International Symposium on Circuits and Systems","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121994793","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
An Integrated Switching Power Converter with a Hybrid Pulse-Train/PWM Control 一种脉冲串/PWM混合控制的集成开关功率变换器
2007 IEEE International Symposium on Circuits and Systems Pub Date : 2007-05-27 DOI: 10.1109/ISCAS.2007.378396
F. Luo, D. Ma
{"title":"An Integrated Switching Power Converter with a Hybrid Pulse-Train/PWM Control","authors":"F. Luo, D. Ma","doi":"10.1109/ISCAS.2007.378396","DOIUrl":"https://doi.org/10.1109/ISCAS.2007.378396","url":null,"abstract":"This paper describes an integrated switching power converter with a hybrid control scheme. The design incorporates a pulse-train control for fast and smooth transient response, and an analog PWM control for low ripple voltage regulation. The converter was designed with a TSMC 0.35 mum CMOS N-well process. The simulation results show that, with a supply voltage of 3.3 V and a maximum load power of 225 mW, the output voltage is well regulated with a ripple voltage down to 6 mV. A fast and smooth transient response is observed with less than 5-mus settling time. The maximum power efficiency is 92.4%with a power range of 30 mW to 225 mW. The entire chip area is 1.69 mm2, including on-chip power transistors. The research provides an effective solution to high-performance integrated power converter designs.","PeriodicalId":274010,"journal":{"name":"2007 IEEE International Symposium on Circuits and Systems","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122117606","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Scaled Lifting Scheme and Generalized Reversible Integer Transform 缩放提升格式与广义可逆整数变换
2007 IEEE International Symposium on Circuits and Systems Pub Date : 2007-05-27 DOI: 10.1109/ISCAS.2007.378153
S. Pei, Jian-Jiun Ding
{"title":"Scaled Lifting Scheme and Generalized Reversible Integer Transform","authors":"S. Pei, Jian-Jiun Ding","doi":"10.1109/ISCAS.2007.378153","DOIUrl":"https://doi.org/10.1109/ISCAS.2007.378153","url":null,"abstract":"In this paper, we generalize the lifting scheme and the triangular matrix scheme. For the existing lifting scheme and the triangular matrix scheme, the entries on the diagonal line must be 1 or 2k. In this paper, we find that this constraint can be relaxed and the lifting or the triangular matrix is still reversible. Thus, the constraint that det(A) = 2L is not required and we can convert a matrix into a reversible integer transform without pre-scaling even when det(A) ne 2L. Moreover, the proposed scaled schemes are also helpful for improving the accuracy and reducing the implementation complexity.","PeriodicalId":274010,"journal":{"name":"2007 IEEE International Symposium on Circuits and Systems","volume":"13 3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116811793","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Error-Resilience Transcoding of H.264/AVC Compressed Videos H.264/AVC压缩视频的容错转码
2007 IEEE International Symposium on Circuits and Systems Pub Date : 2007-05-27 DOI: 10.1109/ISCAS.2007.378697
W. Lie, Han-Ching Yeh, Zhi-Wei Gao, Ping-Chang Jui
{"title":"Error-Resilience Transcoding of H.264/AVC Compressed Videos","authors":"W. Lie, Han-Ching Yeh, Zhi-Wei Gao, Ping-Chang Jui","doi":"10.1109/ISCAS.2007.378697","DOIUrl":"https://doi.org/10.1109/ISCAS.2007.378697","url":null,"abstract":"We propose an error resilience transcoder based on the intra refresh technique for H.264/AVC videos. Our algorithm focuses on making decisions on the number of inserted intra MBs, allocations of proper MBs for intra refresh, and the quantization parameter for each P-frame, according to varying channel condition and frame contents. We build source distortion, channel distortion, and bit-rate models for prediction and adopt the Lagrangian multiplier approach for constrained optimization. Existing algorithms are compared in experiments. The results show that our algorithm improves PSNR by 0.28~2.76 dB, compared to the \"equal intra refresh\" approach. Our algorithm also outperforms CBERC (Chen and Wang, 2001) by 0.1~1.13 dB, with the same number of inserted intra MBs, but different MB priorities in allocation","PeriodicalId":274010,"journal":{"name":"2007 IEEE International Symposium on Circuits and Systems","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129513281","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Power Reduction of On-Chip Serial Links 片上串行链路的功耗降低
2007 IEEE International Symposium on Circuits and Systems Pub Date : 2007-05-27 DOI: 10.1109/ISCAS.2007.378043
Amit Kedia, R. Saleh
{"title":"Power Reduction of On-Chip Serial Links","authors":"Amit Kedia, R. Saleh","doi":"10.1109/ISCAS.2007.378043","DOIUrl":"https://doi.org/10.1109/ISCAS.2007.378043","url":null,"abstract":"On-chip serial links to replace standard buses for global communication have been the subject of a number of recent investigations. The main reason for considering serial links is to reduce routing congestion and design complexity. However, the serialization of parallel data may actually increase the power dissipation due to increased switching activity. This paper describes a new bit ordering technique to reduce switching activity on serial links, assuming that the statistical data of the parallel bus traces are known in advance. The method reduces the switching activity by an average of 40% 50% compared to random bit ordering.","PeriodicalId":274010,"journal":{"name":"2007 IEEE International Symposium on Circuits and Systems","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129756591","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Application-Specific Instruction Generation for SOC Processors SOC处理器专用指令生成
2007 IEEE International Symposium on Circuits and Systems Pub Date : 2007-05-27 DOI: 10.1109/ISCAS.2007.378777
Shengjyi Yang, Chijie Lin, Chiuyun Hung, Jiying Wu, Yiwen Wang
{"title":"Application-Specific Instruction Generation for SOC Processors","authors":"Shengjyi Yang, Chijie Lin, Chiuyun Hung, Jiying Wu, Yiwen Wang","doi":"10.1109/ISCAS.2007.378777","DOIUrl":"https://doi.org/10.1109/ISCAS.2007.378777","url":null,"abstract":"Application-specific instruction set processors assures good tradeoff between efficiency and flexibility in SOC design. However, it is difficult to obtain the extended instructions by manual designs for large programs with various design constraints. A two-phase design flow is proposed to automatically generate application specific instructions to achieve the better performance. Firstly, we translate various applications from C programs to a control/data flow graph. Secondly, a set of proposed algorithms is utilized to analyze the dependency of instructions in the data flow graph as well as to generate and evaluate application-specific instructions. Experimental results indicate that the MiBench applications can be improved about 1.5 to 3.18 times speedup using our generated application-specific instructions.","PeriodicalId":274010,"journal":{"name":"2007 IEEE International Symposium on Circuits and Systems","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129785960","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
A Current-Mode Analog Circuit for Reinforcement Learning Problems 用于强化学习问题的电流模式模拟电路
2007 IEEE International Symposium on Circuits and Systems Pub Date : 2007-05-27 DOI: 10.1109/ISCAS.2007.378410
T. Mak, K. Lam, H. Ng, G. Rachmuth, C. Poon
{"title":"A Current-Mode Analog Circuit for Reinforcement Learning Problems","authors":"T. Mak, K. Lam, H. Ng, G. Rachmuth, C. Poon","doi":"10.1109/ISCAS.2007.378410","DOIUrl":"https://doi.org/10.1109/ISCAS.2007.378410","url":null,"abstract":"Reinforcement learning is important for machine-intelligence and neurophysiological modelling applications to provide time-critical decision making. Analog circuit implementation has been demonstrated as a powerful computational platform for power-efficient, bio-implantable and real-time applications. This paper presents a current-mode analog circuit design for solving reinforcement learning problem with simple and efficient computational network architecture. The design has been fabricated and a new procedure to validate the fabricated reinforcement learning circuit will also be presented. This work provides a preliminary study for future biomedical application using CMOS VLSI reinforcement learning model.","PeriodicalId":274010,"journal":{"name":"2007 IEEE International Symposium on Circuits and Systems","volume":"07 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129873827","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
首页 上一页 下一页 尾页
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整，为了账户安全，请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
请完成安全验证×
相关产品
×
本文献相关产品
联系我们：info@booksci.cn Book学术提供免费学术资源搜索服务，方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号：604180095
Book学术官方微信
小红书