A. Matrosova, S. Ostanin, I. Kirienko, Virendra Singh
{"title":"Partially programmable circuit design","authors":"A. Matrosova, S. Ostanin, I. Kirienko, Virendra Singh","doi":"10.1109/EWDTS.2014.7027067","DOIUrl":"https://doi.org/10.1109/EWDTS.2014.7027067","url":null,"abstract":"The new approach to partially programmable circuit design that allows masking arbitrary gate faults of a logical circuit is considered. It is supposed that only one gate may be fault. There are reserved blocks CLBs (configurable logic block) based on LUTs (Look up table) that may mask the gate fault. The suggested approach in comparison with the currently in use ones allows masking any gate fault but not the certain stuck-at faults at the gate poles.","PeriodicalId":272780,"journal":{"name":"Proceedings of IEEE East-West Design & Test Symposium (EWDTS 2014)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116626318","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
G. Krivoulya, A. Shkil, D. Kucherenko, A. Lipchansky, Y. Sheremet
{"title":"Expert evaluation model of the computer system diagnostic features","authors":"G. Krivoulya, A. Shkil, D. Kucherenko, A. Lipchansky, Y. Sheremet","doi":"10.1109/EWDTS.2014.7027101","DOIUrl":"https://doi.org/10.1109/EWDTS.2014.7027101","url":null,"abstract":"In this paper, the expert diagnostic system (EDS) is suggested to be used for the analysis of the computer system's technical state. The mathematical apparatus that allows to operate the expect assessement of the diagnosis objec'st state (hardware, software or staff) is fuzzy logic. In the preparation stage of the diagnostic experiment (DE) it is proposed to describe the diagnostic features of the computer system in terms of linguistic variables, which makes it possible to use the knowledge and experience of the expert in their familiar form.","PeriodicalId":272780,"journal":{"name":"Proceedings of IEEE East-West Design & Test Symposium (EWDTS 2014)","volume":"40 28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134186103","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Self-testing checker design for incomplete m-out-of-n codes","authors":"N. Butorina","doi":"10.1109/EWDTS.2014.7027072","DOIUrl":"https://doi.org/10.1109/EWDTS.2014.7027072","url":null,"abstract":"This paper presents the synthesis of self-testing checker (STC) for a subset of l codewords of m-out-of-n code. We consider FPGA realization of the checker.","PeriodicalId":272780,"journal":{"name":"Proceedings of IEEE East-West Design & Test Symposium (EWDTS 2014)","volume":"57 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125983748","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Qubit modeling digital systems","authors":"I. Hahanova, I. Emelyanov, Tamer Bani Amer","doi":"10.1109/EWDTS.2014.7027109","DOIUrl":"https://doi.org/10.1109/EWDTS.2014.7027109","url":null,"abstract":"The data structures, effective from the viewpoint of software or hardware implementation of fault-free interpretative modelling discrete systems described in the form of qubit vectors of primitive output states are considered.","PeriodicalId":272780,"journal":{"name":"Proceedings of IEEE East-West Design & Test Symposium (EWDTS 2014)","volume":"254 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122256729","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"SPICE model parameters extraction taking into account the ionizing radiation effects","authors":"K. Petrosyants, M. Kozhukhov","doi":"10.1109/EWDTS.2014.7027055","DOIUrl":"https://doi.org/10.1109/EWDTS.2014.7027055","url":null,"abstract":"Universal SPICE macro-model of Si bipolar junction transistor (BJT) and SiGe heterojunction bipolar transistor (HBT) taking into account total irradiation dose effects is presented. A method of macro-model radiation-dependent parameters extraction from the measured data is described. The advantage of the proposed method is simplicity of parameter definition. Simulated and measured transistor characteristics are in a good agreement.","PeriodicalId":272780,"journal":{"name":"Proceedings of IEEE East-West Design & Test Symposium (EWDTS 2014)","volume":"45 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127718056","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"The impact of sensors' implementation on lift control system","authors":"S. Lupin, K. Lin, A. Davydova, Y. Vagapov","doi":"10.1109/EWDTS.2014.7027077","DOIUrl":"https://doi.org/10.1109/EWDTS.2014.7027077","url":null,"abstract":"The paper discusses the impact of implementation of a variety of sensors into lift control system on its performance. It is shown that a hybrid model combining agent-based and discrete event methods can be used to assess operation of lift control systems. The proposed model has been simulated using AnyLogic systems to estimate impact of an additional sensor on performance of a ten floor lift system.","PeriodicalId":272780,"journal":{"name":"Proceedings of IEEE East-West Design & Test Symposium (EWDTS 2014)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127726130","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Threshold method of measurement of extended objects speed of radio engineering devices of short-range detection","authors":"V. Artyushenko, V. I. Volovach","doi":"10.1109/EWDTS.2014.7027078","DOIUrl":"https://doi.org/10.1109/EWDTS.2014.7027078","url":null,"abstract":"The threshold way of measurement of speed of movement of extended objects is considered and analyzed. It is shown that implementation of an amplitude threshold allows to reduce more than two-times values of dispersion of estimates of speed in a wide band of frequencies and to lower all spectral components of phase noise. The fact of exponential reduction of spectral density of this noise up to zero with threshold growth is especially important. The carried-out theoretical and numerical analysis allows to give estimates of potentially achievable accuracy of measurement of extended objects movement speed.","PeriodicalId":272780,"journal":{"name":"Proceedings of IEEE East-West Design & Test Symposium (EWDTS 2014)","volume":"37 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127759179","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Design of low-ripple multi-topology step-down switched capacitor power converter with adaptive control system","authors":"Vazgen Melikyan, V. Galstyan","doi":"10.1109/EWDTS.2014.7027083","DOIUrl":"https://doi.org/10.1109/EWDTS.2014.7027083","url":null,"abstract":"The paper presents a multi-topology step-down switched-capacitor (SC) converter with a novel adaptive control. The control system adjusts the number of SC cores to significantly reduce output voltage ripple, as well as performs dynamic frequency control depending on actual load of the converter. By means of new dynamic control system, the converter achieves 50ns response time and 24mV of maximal output ripple over wide range of load currents. Due to multi-topology structure high efficiency is provided over 1.5V range of input voltage. The converter is designed in 40nm CMOS process using the proposed technique.","PeriodicalId":272780,"journal":{"name":"Proceedings of IEEE East-West Design & Test Symposium (EWDTS 2014)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129779600","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
V. Kharchenko, Alexandr Orehov, Eugene Brezhnev, A. Orehova, Viacheslav Manulik
{"title":"The cooperative human-machine interfaces for cloud-based advanced driver assistance systems: Dynamic analysis and assurance of vehicle safety","authors":"V. Kharchenko, Alexandr Orehov, Eugene Brezhnev, A. Orehova, Viacheslav Manulik","doi":"10.1109/EWDTS.2014.7027096","DOIUrl":"https://doi.org/10.1109/EWDTS.2014.7027096","url":null,"abstract":"Intelligent transportation systems (ITS), which provide an Intelligent of paradigm of active safety and principles of construction of human-machine interfaces (HMI) for vehicles are analyzed. An overview of approaches to the construction of such systems based on cloud computing (CC) is provided. The concept of safe cooperative humanmachine interfaces (CHMI) is formulated. Variants of implementation for safety improvement and reducing of risk of vehicle accidents by means of rapid data exchange about driver's state, traffic situation in the zone of potential danger and information from Advanced Driver Assistance Systems are suggested.","PeriodicalId":272780,"journal":{"name":"Proceedings of IEEE East-West Design & Test Symposium (EWDTS 2014)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121096044","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
N. Prokopenko, N. Butyrlagin, A. Serebryakov, I. Pakhomov
{"title":"The input analog section of the ultrafast ADCs","authors":"N. Prokopenko, N. Butyrlagin, A. Serebryakov, I. Pakhomov","doi":"10.1109/EWDTS.2014.7027051","DOIUrl":"https://doi.org/10.1109/EWDTS.2014.7027051","url":null,"abstract":"The modified method of the increase of the response speed of flash ADCs with the differential input which renders possible to reduce the effect of the parasitic capacitances of active and passive components of the analog sections and also to optimize their gain flatness is reviewed. The additional emitter follower and balancing capacitor are fed into each analog section to extend the bandwidth of ADC up to 50 GH.","PeriodicalId":272780,"journal":{"name":"Proceedings of IEEE East-West Design & Test Symposium (EWDTS 2014)","volume":"267 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124342472","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}