{"title":"Comparison of Two-Types of Monolithic 3D Inverter Consisting of MOSFETs and Junctionless FETs","authors":"T. Ahn, Y. Yu, N. Kim","doi":"10.1109/ICEIC49074.2020.9051059","DOIUrl":"https://doi.org/10.1109/ICEIC49074.2020.9051059","url":null,"abstract":"The electrical coupling with stacked transistors in two types of monolithic 3D inverter (M3DINV) are investigated. One is stacked with n-type and p-type MOSFETs and another is stacked with n-type and p-type junctionless field-effect transistors. The coupling of stacked transistors in two-types of M3DINV is investigated in terms of various thickness of interlayer distance (ILD) between stacked transistors. When the thickness of both ILDs between stacked JLFETs and stacked MOSFETs are more than 30 nm, both interactions between the stacked JLFETs and stacked MOSFETs can be neglected.","PeriodicalId":271345,"journal":{"name":"2020 International Conference on Electronics, Information, and Communication (ICEIC)","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127297200","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Electrical Brain Stimulation for Punishment and Reward","authors":"Youjin Lee, S. Jun","doi":"10.1109/ICEIC49074.2020.9051370","DOIUrl":"https://doi.org/10.1109/ICEIC49074.2020.9051370","url":null,"abstract":"Recently, electrical stimulation on the brain has been widely used for neuroscience research as well as medical purposes such as deep brain stimulation (DBS), cochlear implant, and spinal cord stimulation [1]–[3]. In this study, electrical brain stimulation was employed to control rodent's movement behaviors. Tungsten wire electrodes were characterized and implanted into the target regions of rat brain. Two brain areas were targeted; medial forelimb bundle (MFB) and amygdala as a reward and punishment, respectively. MFB is known to be related with learning and memory while amygdala is the center for fear modulation in the brain. The stimulation-induced behaviors of rats were monitored and analyzed for both reward and punishment.","PeriodicalId":271345,"journal":{"name":"2020 International Conference on Electronics, Information, and Communication (ICEIC)","volume":"126 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127970975","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Hierarchical AI - from neurons to psychology","authors":"Serb Alexantrou, T. Prodromakis","doi":"10.1109/ICEIC49074.2020.9051149","DOIUrl":"https://doi.org/10.1109/ICEIC49074.2020.9051149","url":null,"abstract":"The undeniable successes of deep learning (and more generally statistical learning) in bringing pattern matching to the market is still just the tip of the iceberg of AI. In this talk we will look at a very high level overview of AI as a whole and see how it can be interpreted at very different levels of abstraction. Each level of abstraction boasts its own vocabulary and is suited to understanding different aspects of the general problem of artificial intelligence. We will walk through four “levels of abstraction of AI” ranging from physical implementation all the way to semantic processing, and will investigate how memory technologies can play a vital role in their successful implementation. The aim is to show how innovation in the domain of memory tech can unlock the potential of AI to attack problems much more general than simple pattern matching and thus pave the way to the next wave of AI on the market.","PeriodicalId":271345,"journal":{"name":"2020 International Conference on Electronics, Information, and Communication (ICEIC)","volume":"417 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125142370","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Memory-Efficient Architecture for Contrast Enhancement and Integral Image Computation","authors":"Dongsub Kim, Jongkil Hyun, Byungin Moon","doi":"10.1109/ICEIC49074.2020.9051296","DOIUrl":"https://doi.org/10.1109/ICEIC49074.2020.9051296","url":null,"abstract":"This paper proposes a hardware architecture for contrast-limited adaptive histogram equalization (CLAHE) and integral image computation, focusing on the efficient use of memory resources. To save memory resources, the proposed architecture processes each pixel entered in real time without storing the entire image. In addition, this architecture improves resource utilization by optimizing the tile size of CLAHE and computing the integral image via an adder tree. When the proposed architecture was implemented in Xilinx's FPGA XC7Z045 FFG900-2, it used 98,945 slice LUTs, 85,600 slice registers, and 8 BRAMs for the CLAHE module, and it used 7,834 slice LUTs, 7,498 slice registers, and 19 BRAMs for the integral image module. In addition, the proposed architecture operated at a maximum frequency of 129 MHz in 512 × 512 image resolution.","PeriodicalId":271345,"journal":{"name":"2020 International Conference on Electronics, Information, and Communication (ICEIC)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133893747","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"The Effects of Varying the Location of Antenna Feed Gaps on Mutual Coupling Between Orthogonal Circular Loops","authors":"G. Arada, T. Hirano","doi":"10.1109/ICEIC49074.2020.9051023","DOIUrl":"https://doi.org/10.1109/ICEIC49074.2020.9051023","url":null,"abstract":"This work aims to investigate how varying the location of antenna feed gaps affect the mutual coupling between orthogonal circular loops. Since the orthogonal circular loops, which is a type of loop antenna array, provide better gain than a single loop antenna, investigating the mutual coupling on the array could contribute to the improvement of its radiation. Using the Method of Moment (MoM)-based simulation tool that computes the Z-parameters, which are the mutual impedances and self-impedances, this paper provides clearer three-dimensional illustrations and advances intuitive insights that would facilitate better understanding of the mutual coupling phenomenon. Prior studies mostly presented two-dimensional illustrations derived from analytical solutions on mutual coupling. The elements of the Z-matrix, namely mutual impedances, $mathrm{Z}_{12}$ and $mathrm{Z}_{21}$, and the self-impedances, $mathrm{Z}_{11}$ and $mathrm{Z}_{22}$, are clearly plotted against the rotational angles and carefully analyzed in order to effectively discuss the effects on mutual coupling when the relative locations of the feed gaps along the circular loops are varied.","PeriodicalId":271345,"journal":{"name":"2020 International Conference on Electronics, Information, and Communication (ICEIC)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134027024","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"SDN Network Slicing for URLLC NB-IOT","authors":"Anteneh Adem, J. Costa-Requena, R. Kantola","doi":"10.1109/ICEIC49074.2020.9051156","DOIUrl":"https://doi.org/10.1109/ICEIC49074.2020.9051156","url":null,"abstract":"Current mobile networks are considering mobile devices i.e. User Equipment (UE) associated to a single user. 3GPP has integrated Machine to machine communications and Narrow-Band IoT requirements only in recent releases. The Internet of Things (IoT) devices are autonomous, large in number and often lacking user interface. Different proprietary management solutions have been proposed and implemented to collect data and manage the IoT devices. This paper presents the results of analyzing 3GPP standards for managing device subscriptions such as the User Data Convergence (UDC). The UDC combined with the usage of SDN delivers network slicing to deliver Ultra Reliable Low Latency (URLLC) for Nb-IoT traffic required for industrial communications. A prototype of the design was developed and tested to check the feasibility and this paper presents the results that show the solution could work under the right setup","PeriodicalId":271345,"journal":{"name":"2020 International Conference on Electronics, Information, and Communication (ICEIC)","volume":"69 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134461934","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Jinn-Shyan Wang, Cheng-Xin Xue, Chien-Tung Liu, Tay-Jyi Lin
{"title":"A 0.23V 40nm OAI-ROM with Low Active and Standby Power for AI-based IoT Edge Devices","authors":"Jinn-Shyan Wang, Cheng-Xin Xue, Chien-Tung Liu, Tay-Jyi Lin","doi":"10.1109/ICEIC49074.2020.9051040","DOIUrl":"https://doi.org/10.1109/ICEIC49074.2020.9051040","url":null,"abstract":"Sub-threshold (sub-Vt) ROM is the code storage element in AI-based IoT devices, such as voice-activated edge-computing SoCs. Reducing standby power for longer battery life and improving operating speed for faster response are two design pursuits for sub-Vt ROM. A conventional NAND-ROM used an extra code-inversion-based flag-table for enhancing speed but sacrificing leakage. In this work, we propose OAI-ROM to improve speed without using the flag-table for leakage reduction. The proposed ROM adopts the interleaved-shielding scheme to avoid crosstalk and the adaptive leakage compensation to achieve variation-resilient sub-Vt operation. The 40nm OAI-ROM has a minimum supply voltage of 0.23V with 23% and 88% less active and standby power, respectively, and 1.67 times higher speed compared to the NAND-ROM redesigned in the same CMOS.","PeriodicalId":271345,"journal":{"name":"2020 International Conference on Electronics, Information, and Communication (ICEIC)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134534994","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Short Research on Voice Control System Based on Artificial Intelligence Assistant","authors":"Tae-Kook Kim","doi":"10.1109/ICEIC49074.2020.9051160","DOIUrl":"https://doi.org/10.1109/ICEIC49074.2020.9051160","url":null,"abstract":"This paper proposes a voice control system based on artificial intelligence (AI) assistant. The AI assistant system using Google Assistant, a representative service of open API artificial intelligence, and the conditional auto-run system, IFTTT(IF This, Then That) was designed. It cost-effectively implemented the system using Raspberry Pi, voice recognition module, and open software. The proposed system is expected to be applied to various control systems based on voice recognition.","PeriodicalId":271345,"journal":{"name":"2020 International Conference on Electronics, Information, and Communication (ICEIC)","volume":"110 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123547490","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
S. Jeon, Jae-Sang Lee, Seok-Ho Hong, Do-Hyun Kim, Young-Wan Choi
{"title":"Analysis of position error generated in readout resistive network for gamma-ray detection system","authors":"S. Jeon, Jae-Sang Lee, Seok-Ho Hong, Do-Hyun Kim, Young-Wan Choi","doi":"10.1109/ICEIC49074.2020.9051366","DOIUrl":"https://doi.org/10.1109/ICEIC49074.2020.9051366","url":null,"abstract":"Detectors such as photomultiplier tubes (PMT) and Si photomultipliers (SiPM) in array are used in the gamma-ray detection system. They convert the light to electrical signal in the form of a current pulse by photoelectric effect. Because size and power consumption of the detection system is determined by the number of output channels in the detector, a resistive network such as a discretized positioning circuit (DPC) has been used for reducing the number of output channels. The current pulse generated in the detector is distributed to four output ports according to a ratio by resistance of the DPC. Then, the distributed current pulses convert voltage pulses by a charge sensitive amplifier (CSA). The detected positions are estimated by the peak value of the four CSA outputs. However, the position errors occur due to the impedance difference between output of the DPC and input of the CSA. In this paper, we calculated input impedance of the CSA according to variation of CSA's feedback component. Also, we analyzed the cause of position error generated by the impedance difference.","PeriodicalId":271345,"journal":{"name":"2020 International Conference on Electronics, Information, and Communication (ICEIC)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125034904","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Overall Torque Ripple Reduction by Constant Band Hysteresis Current Controller with Back EMF Phase Shift Error Compensator in BLDC Motor Drive","authors":"Yongkeun Lee","doi":"10.1109/ICEIC49074.2020.9051125","DOIUrl":"https://doi.org/10.1109/ICEIC49074.2020.9051125","url":null,"abstract":"Torque ripple is always problematic in BLDC motor drive. The torque ripple particularly during commutation period is significant and caused mostly by nonequal but opposite commutation phase current rate as well as back electromotive force (EMF) phase shift. In this paper, a constant band hysteresis current controller with back EMF phase shift error compensator for the brushless DC (BLDC) motor is presented to minimize the overall torque ripple. The detailed proposed technique is elucidated and the performance is verified via Matlab/Simulink simulation and the experimental results respectively.","PeriodicalId":271345,"journal":{"name":"2020 International Conference on Electronics, Information, and Communication (ICEIC)","volume":"37 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127229332","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}