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Real Time Implementation of Convolutional Neural Network to Detect Plant Diseases Using Internet of Things 基于物联网的卷积神经网络植物病害检测的实时实现
International Symposium on VLSI Design and Test Pub Date : 2019-07-04 DOI: 10.1007/978-981-32-9767-8_42
Govind Bajpai, Aniket Gupta, Nitanshu Chauhan
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引用次数: 4
All-Digital CMOS On-Chip Temperature Sensor with Time-Assisted Analytical Model 全数字CMOS片上温度传感器与时间辅助分析模型
International Symposium on VLSI Design and Test Pub Date : 2019-07-04 DOI: 10.1007/978-981-32-9767-8_62
Ankur Pokhara, B. Mishra, Purvi Patel
{"title":"All-Digital CMOS On-Chip Temperature Sensor with Time-Assisted Analytical Model","authors":"Ankur Pokhara, B. Mishra, Purvi Patel","doi":"10.1007/978-981-32-9767-8_62","DOIUrl":"https://doi.org/10.1007/978-981-32-9767-8_62","url":null,"abstract":"","PeriodicalId":270429,"journal":{"name":"International Symposium on VLSI Design and Test","volume":"141 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-07-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114655366","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Design and Analysis for Power Reduction with High SNM of 10T SRAM Cell 10T SRAM单元高SNM降功耗设计与分析
International Symposium on VLSI Design and Test Pub Date : 2019-07-04 DOI: 10.1007/978-981-32-9767-8_45
Kamini Singh, R. Gamad, P. Bansod
{"title":"Design and Analysis for Power Reduction with High SNM of 10T SRAM Cell","authors":"Kamini Singh, R. Gamad, P. Bansod","doi":"10.1007/978-981-32-9767-8_45","DOIUrl":"https://doi.org/10.1007/978-981-32-9767-8_45","url":null,"abstract":"","PeriodicalId":270429,"journal":{"name":"International Symposium on VLSI Design and Test","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-07-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128360708","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A True Single-Phase Error Masking Flip-Flop with Reduced Clock Power for Near-Threshold Designs 用于近阈值设计的低时钟功率的真单相错误屏蔽触发器
International Symposium on VLSI Design and Test Pub Date : 2019-07-04 DOI: 10.1007/978-981-32-9767-8_32
Priyamvada Sharma, B. P. Das
{"title":"A True Single-Phase Error Masking Flip-Flop with Reduced Clock Power for Near-Threshold Designs","authors":"Priyamvada Sharma, B. P. Das","doi":"10.1007/978-981-32-9767-8_32","DOIUrl":"https://doi.org/10.1007/978-981-32-9767-8_32","url":null,"abstract":"","PeriodicalId":270429,"journal":{"name":"International Symposium on VLSI Design and Test","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-07-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120953879","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Design of 635 MHz Bandpass Filter Using High-Q Floating Active Inductor 基于高q浮动有源电感的635mhz带通滤波器设计
International Symposium on VLSI Design and Test Pub Date : 2019-07-04 DOI: 10.1007/978-981-32-9767-8_10
A. Hota, K. Sethi
{"title":"Design of 635 MHz Bandpass Filter Using High-Q Floating Active Inductor","authors":"A. Hota, K. Sethi","doi":"10.1007/978-981-32-9767-8_10","DOIUrl":"https://doi.org/10.1007/978-981-32-9767-8_10","url":null,"abstract":"","PeriodicalId":270429,"journal":{"name":"International Symposium on VLSI Design and Test","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-07-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114390585","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Technology Characterization Model and Scaling for Energy Management 能源管理技术表征模型与标度
International Symposium on VLSI Design and Test Pub Date : 2019-07-04 DOI: 10.1007/978-981-32-9767-8_56
Harshil Goyal, V. Agrawal
{"title":"Technology Characterization Model and Scaling for Energy Management","authors":"Harshil Goyal, V. Agrawal","doi":"10.1007/978-981-32-9767-8_56","DOIUrl":"https://doi.org/10.1007/978-981-32-9767-8_56","url":null,"abstract":"","PeriodicalId":270429,"journal":{"name":"International Symposium on VLSI Design and Test","volume":"69 3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-07-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134110950","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Generalized Technique of Automated Pin Sharing on Hexagonal Electrode Based Digital Microfluidic Biochip Along with Its Design Methodology 基于六边形电极的数字微流控生物芯片自动引脚共享的通用技术及其设计方法
International Symposium on VLSI Design and Test Pub Date : 2019-07-04 DOI: 10.1007/978-981-32-9767-8_8
Amartya Dutta, Riya Majumder, D. Dhal, R. Pal
{"title":"A Generalized Technique of Automated Pin Sharing on Hexagonal Electrode Based Digital Microfluidic Biochip Along with Its Design Methodology","authors":"Amartya Dutta, Riya Majumder, D. Dhal, R. Pal","doi":"10.1007/978-981-32-9767-8_8","DOIUrl":"https://doi.org/10.1007/978-981-32-9767-8_8","url":null,"abstract":"","PeriodicalId":270429,"journal":{"name":"International Symposium on VLSI Design and Test","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-07-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117090570","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Design and Physical Implementation of Mixed Signal Elapsed Time Counter in 0.18 µm CMOS Technology 基于0.18µm CMOS技术的混合信号经过时间计数器的设计与物理实现
International Symposium on VLSI Design and Test Pub Date : 2019-07-04 DOI: 10.1007/978-981-32-9767-8_11
S. Siddamal, Suhas B. Shirol, Shraddha B Hiremath, N. Iyer
{"title":"Design and Physical Implementation of Mixed Signal Elapsed Time Counter in 0.18 µm CMOS Technology","authors":"S. Siddamal, Suhas B. Shirol, Shraddha B Hiremath, N. Iyer","doi":"10.1007/978-981-32-9767-8_11","DOIUrl":"https://doi.org/10.1007/978-981-32-9767-8_11","url":null,"abstract":"","PeriodicalId":270429,"journal":{"name":"International Symposium on VLSI Design and Test","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-07-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131601182","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Analyzing Design Parameters of Nano-Magnetic Technology Based Converter Circuit 基于纳米磁技术的变换器电路设计参数分析
International Symposium on VLSI Design and Test Pub Date : 2019-07-04 DOI: 10.1007/978-981-32-9767-8_4
B. Bhoi, NEERAJ KUMAR MISRA, S. Chouhan, Sarthak Acharya
{"title":"Analyzing Design Parameters of Nano-Magnetic Technology Based Converter Circuit","authors":"B. Bhoi, NEERAJ KUMAR MISRA, S. Chouhan, Sarthak Acharya","doi":"10.1007/978-981-32-9767-8_4","DOIUrl":"https://doi.org/10.1007/978-981-32-9767-8_4","url":null,"abstract":"","PeriodicalId":270429,"journal":{"name":"International Symposium on VLSI Design and Test","volume":"191 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-07-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123263390","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Clock Pulse Based Foreground Calibration of a Sub-Radix-2 Successive Approximation Register ADC 基于时钟脉冲的次基2逐次逼近寄存器ADC前景标定
International Symposium on VLSI Design and Test Pub Date : 2019-07-04 DOI: 10.1007/978-981-32-9767-8_12
M. M. Reddy, Sounak Roy
{"title":"Clock Pulse Based Foreground Calibration of a Sub-Radix-2 Successive Approximation Register ADC","authors":"M. M. Reddy, Sounak Roy","doi":"10.1007/978-981-32-9767-8_12","DOIUrl":"https://doi.org/10.1007/978-981-32-9767-8_12","url":null,"abstract":"","PeriodicalId":270429,"journal":{"name":"International Symposium on VLSI Design and Test","volume":"58 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-07-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126800765","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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