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Proceedings of the 10th International Symposium on the Physical and Failure Analysis of Integrated Circuits. IPFA 2003最新文献

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Real case studies of fast wafer level reliability (FWLR) EM test as process reliability monitor methodology 快速晶圆级可靠性(FWLR)电磁测试作为过程可靠性监测方法的实际案例研究
Proceedings of the 10th International Symposium on the Physical and Failure Analysis of Integrated Circuits. IPFA 2003 Pub Date : 2003-07-07 DOI: 10.1109/IPFA.2003.1222750
A. Yap, T.W.H. Ling, H. Yap, B. H. Lim, Y. Tan, K. Lo
{"title":"Real case studies of fast wafer level reliability (FWLR) EM test as process reliability monitor methodology","authors":"A. Yap, T.W.H. Ling, H. Yap, B. H. Lim, Y. Tan, K. Lo","doi":"10.1109/IPFA.2003.1222750","DOIUrl":"https://doi.org/10.1109/IPFA.2003.1222750","url":null,"abstract":"In this paper, we present real case studies to illustrate SWEAT and ISOT EM tests effectiveness as reliability screens and monitoring methodology.","PeriodicalId":266326,"journal":{"name":"Proceedings of the 10th International Symposium on the Physical and Failure Analysis of Integrated Circuits. IPFA 2003","volume":"46 8","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-07-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114022768","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Application of IR-OBIRCH to the failure analysis of CMOS integrated circuits IR-OBIRCH在CMOS集成电路失效分析中的应用
Proceedings of the 10th International Symposium on the Physical and Failure Analysis of Integrated Circuits. IPFA 2003 Pub Date : 2003-07-07 DOI: 10.1109/IPFA.2003.1222744
L. Soon, D.T.M. Ling, M. Kuan, K. W. Yee, D. Cheong, G. Zhang
{"title":"Application of IR-OBIRCH to the failure analysis of CMOS integrated circuits","authors":"L. Soon, D.T.M. Ling, M. Kuan, K. W. Yee, D. Cheong, G. Zhang","doi":"10.1109/IPFA.2003.1222744","DOIUrl":"https://doi.org/10.1109/IPFA.2003.1222744","url":null,"abstract":"IR-OBIRCH (Infra-Red Optical Beam Induced Resistance Change) is a revolutionary new method for the localization of leakage current paths and detection of abnormal resistance in interconnects of ULSI devices. Application of this technique to the actual failure analysis of 0.25 /spl mu/m, 0.22 /spl mu/m & 0.18 /spl mu/m CMOS integrated circuits in volume production was demonstrated. It was found that IR-OBIRCH is a powerful fault isolation technique. Process defects detectable using this technique in our experience are: 1) Short circuits due to interconnect bridging. 2) Short circuits due to poly-gate bridging or poly-gate to source/drain bridging. 3) Resistive Vias due to the presence of micro-voids or residue at via/metal interface.","PeriodicalId":266326,"journal":{"name":"Proceedings of the 10th International Symposium on the Physical and Failure Analysis of Integrated Circuits. IPFA 2003","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-07-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116813962","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Plasma charging damage immunities of rapid thermal nitrided oxide and decoupled plasma nitrided oxide 快速热氮化氧化物和去耦等离子体氮化氧化物的等离子体充电损伤免疫
Proceedings of the 10th International Symposium on the Physical and Failure Analysis of Integrated Circuits. IPFA 2003 Pub Date : 2003-07-07 DOI: 10.1109/IPFA.2003.1222754
D. Chong, W. Yoo, C. Lek
{"title":"Plasma charging damage immunities of rapid thermal nitrided oxide and decoupled plasma nitrided oxide","authors":"D. Chong, W. Yoo, C. Lek","doi":"10.1109/IPFA.2003.1222754","DOIUrl":"https://doi.org/10.1109/IPFA.2003.1222754","url":null,"abstract":"Plasma process induced damage on rapid thermal nitrided oxide (RTNO) and decoupled plasma nitrided oxide (DPNO) gate dielectrics are evaluated. It is found that the level of plasma induced damage on DPNO is comparable to that of RTNO. Hence, we can conclude that the decoupled plasma nitridation (DPN) process does not introduce significant damage to the silicon dioxide gate dielectric. We also discovered that RTNO fares better than DPNO in term of plasma charging damage immunity when both gate dielectrics are subjected to simulated plasma charging stresses.","PeriodicalId":266326,"journal":{"name":"Proceedings of the 10th International Symposium on the Physical and Failure Analysis of Integrated Circuits. IPFA 2003","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-07-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127825504","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
MEMS failure analysis and reliability MEMS失效分析与可靠性
Proceedings of the 10th International Symposium on the Physical and Failure Analysis of Integrated Circuits. IPFA 2003 Pub Date : 2003-07-07 DOI: 10.1109/IPFA.2003.1222713
V. Samper, A. Trigg
{"title":"MEMS failure analysis and reliability","authors":"V. Samper, A. Trigg","doi":"10.1109/IPFA.2003.1222713","DOIUrl":"https://doi.org/10.1109/IPFA.2003.1222713","url":null,"abstract":"MEMS devices offer great potential benefits as sensors and actuators. By using and modifying the fabrication techniques originally developed for integrated circuits, microscopic devices can be formed which match or exceed the performance of their conventional counterparts in a smaller volume with lower weight and a greatly reduced cost. There are however considerable challenges in fabricating and packaging such devices and, in particular, there are many yield and reliability issues to be overcome. Some of the failure mechanisms are similar to those encountered in conventional integrated circuits while others are unique to MEMS devices. These failure mechanisms will be discussed and case studies used to illustrate some of the unique issues that need to be addressed.","PeriodicalId":266326,"journal":{"name":"Proceedings of the 10th International Symposium on the Physical and Failure Analysis of Integrated Circuits. IPFA 2003","volume":"68 12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-07-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130039358","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 15
Gate dielectric breakdown induced microstructural damages in MOSFETs 栅极介电击穿诱导mosfet微结构损伤
Proceedings of the 10th International Symposium on the Physical and Failure Analysis of Integrated Circuits. IPFA 2003 Pub Date : 2003-07-07 DOI: 10.1109/IPFA.2003.1222753
L. Tang, K. Pey, C. Tung, M. Radhakrishnan, W. Lin
{"title":"Gate dielectric breakdown induced microstructural damages in MOSFETs","authors":"L. Tang, K. Pey, C. Tung, M. Radhakrishnan, W. Lin","doi":"10.1109/IPFA.2003.1222753","DOIUrl":"https://doi.org/10.1109/IPFA.2003.1222753","url":null,"abstract":"Numerous failure mechanisms associated with hard breakdowns (HBD) in ultrathin gate oxides were physically studied by high resolution TEM. Migration of silicide from silicided gate and source/drain regions, abnormal growth of dielectric-breakdown-induce-Si epitaxy (DBIE), poly-Si gate melt-down and recrystallization, severe damage in Si substrate and total epitaxy of poly-Si gate and Si substrate of the entire transistor are among the common microstructural damages observed in MOSFETs after hard breakdowns in gate oxides (Gox) were observed electrically. The type of catastrophic failures and its degree of damage are found to be strongly dependent on the allowable current density and total resistance of the breakdown path during the breakdown transient. The physical analysis data from TEM analysis allow us to establish the sequence of the physical damages associated with the Gox HBD in transistors. The proposed model is able to predict the next possible microstructural damage induced by HBD.","PeriodicalId":266326,"journal":{"name":"Proceedings of the 10th International Symposium on the Physical and Failure Analysis of Integrated Circuits. IPFA 2003","volume":"73 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-07-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123223590","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
Electromigration reliability of Cu interconnects and the impact of low-k dielectrics 铜互连的电迁移可靠性及低k介电介质的影响
Proceedings of the 10th International Symposium on the Physical and Failure Analysis of Integrated Circuits. IPFA 2003 Pub Date : 2003-07-07 DOI: 10.1109/IPFA.2003.1222739
P. Ho, K.-D. Lee, E. Ogawa, X. Lu, H. Matsuhashi
{"title":"Electromigration reliability of Cu interconnects and the impact of low-k dielectrics","authors":"P. Ho, K.-D. Lee, E. Ogawa, X. Lu, H. Matsuhashi","doi":"10.1109/IPFA.2003.1222739","DOIUrl":"https://doi.org/10.1109/IPFA.2003.1222739","url":null,"abstract":"Electromigration (EM) reliability in Cu dual-damascene structures integrated with oxide and low-k ILD was investigated using a statistical approach. This approach is efficient in addressing early failures using multi-link structures to sample very large number of interconnect elements. In this paper, we summarize results first on early failures of Cu/oxide structures, then EM characteristics of Cu/low-k structures are discussed and compared with Cu/oxide structures. The integration of low-k ILD was found to degrade EM performance and to induce a new failure mechanism. These results can be attributed to the thermomechanical properties of the low-k ILD and its implication on EM reliability will be discussed.","PeriodicalId":266326,"journal":{"name":"Proceedings of the 10th International Symposium on the Physical and Failure Analysis of Integrated Circuits. IPFA 2003","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-07-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126335151","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Analysis of abnormal ESD failure mechanism in high-pin-count BGA packaged ICs due to stressing non-connected balls 高引脚数BGA封装ic中应力非连接球导致的异常ESD失效机制分析
Proceedings of the 10th International Symposium on the Physical and Failure Analysis of Integrated Circuits. IPFA 2003 Pub Date : 2003-07-07 DOI: 10.1109/IPFA.2003.1222760
Wen-Yu Lo, M. Ker
{"title":"Analysis of abnormal ESD failure mechanism in high-pin-count BGA packaged ICs due to stressing non-connected balls","authors":"Wen-Yu Lo, M. Ker","doi":"10.1109/IPFA.2003.1222760","DOIUrl":"https://doi.org/10.1109/IPFA.2003.1222760","url":null,"abstract":"An abnormal failure mechanism due to ESD stressing on the Non-Connected (NC) balls of a high-pin-count (>500 balls) BGA packaged IC is presented. Failure analyses including Scanning Electronic Microscopy (SEM) photographs and the measurement of current waveform during ESD zapping had been performed to give clear explanation on this unusual phenomenon. New protection solutions have been proposed to solve this problem in a BGA packaged IC product with an improvement ESD robustness, which can sustain 3-kV HBM and 300-V MM ESD stresses.","PeriodicalId":266326,"journal":{"name":"Proceedings of the 10th International Symposium on the Physical and Failure Analysis of Integrated Circuits. IPFA 2003","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-07-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129745937","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
High reliability HV-CMOS transistors in standard CMOS technology 采用标准CMOS技术的高可靠性高压CMOS晶体管
Proceedings of the 10th International Symposium on the Physical and Failure Analysis of Integrated Circuits. IPFA 2003 Pub Date : 2003-07-07 DOI: 10.1109/IPFA.2003.1222714
W.F. Sun, L. Shi
{"title":"High reliability HV-CMOS transistors in standard CMOS technology","authors":"W.F. Sun, L. Shi","doi":"10.1109/IPFA.2003.1222714","DOIUrl":"https://doi.org/10.1109/IPFA.2003.1222714","url":null,"abstract":"A novel high-reliability HV-CMOS (High Voltage CMOS) compatible with 0.6/spl mu/m rules standard Bulk-Silicon (BS) CMOS process was proposed. The reliability of the HV-CMOS is greatly improved by adding the p-well to HV-PMOS (High Voltage PMOS) for etching the unwanted thick-gate-oxide film and that to HV-DNMOS (High Voltage Double-Diffusion NMOS) for preventing punch-through. The breakdown voltage of the presented HV-CMOS exceeds 100 V, which can be used in power driver ICs, etc.","PeriodicalId":266326,"journal":{"name":"Proceedings of the 10th International Symposium on the Physical and Failure Analysis of Integrated Circuits. IPFA 2003","volume":"103 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-07-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126013353","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Study of oxide surface contamination using ToF-SIMS 利用ToF-SIMS研究氧化物表面污染
Proceedings of the 10th International Symposium on the Physical and Failure Analysis of Integrated Circuits. IPFA 2003 Pub Date : 2003-07-07 DOI: 10.1109/IPFA.2003.1222745
D. Lu
{"title":"Study of oxide surface contamination using ToF-SIMS","authors":"D. Lu","doi":"10.1109/IPFA.2003.1222745","DOIUrl":"https://doi.org/10.1109/IPFA.2003.1222745","url":null,"abstract":"Amine-induced photoresist poisoning is well known. However, the mechanism for the formation of this amine contamination is still not well understood. In this study, it has been found that wet cleaning of the oxide surface a small amount of hydrocarbons, which are responsible for the gradual accumulation of amine species via airborne molecular contamination.","PeriodicalId":266326,"journal":{"name":"Proceedings of the 10th International Symposium on the Physical and Failure Analysis of Integrated Circuits. IPFA 2003","volume":"289 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-07-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114846211","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Proceedings of the 10th International Symposium on the Physical and Failure Analysis of Integrated Circuits. IPFA 2003 第十届集成电路物理与失效分析国际研讨会论文集。IPFA 2003
Proceedings of the 10th International Symposium on the Physical and Failure Analysis of Integrated Circuits. IPFA 2003 Pub Date : 1900-01-01 DOI: 10.1109/IPFA.2003.1222709
Alastair Trigg, Daniel Chan, John Thong
{"title":"Proceedings of the 10th International Symposium on the Physical and Failure Analysis of Integrated Circuits. IPFA 2003","authors":"Alastair Trigg, Daniel Chan, John Thong","doi":"10.1109/IPFA.2003.1222709","DOIUrl":"https://doi.org/10.1109/IPFA.2003.1222709","url":null,"abstract":"The following topics were dealt: Failure analysis I; reliability and failure analysis in specialist devices; failure analysis II; advanced interconnects I; failure analysis III; packaging related failure mechanisms; advanced interconnects; dielectrics and hot carrier reliability I; dielectrics and hot carrier reliability II; EOS/ESD and CMOS latchup; failure analysis IV; failure analysis V.","PeriodicalId":266326,"journal":{"name":"Proceedings of the 10th International Symposium on the Physical and Failure Analysis of Integrated Circuits. IPFA 2003","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114162355","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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