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2011 3rd IEEE International Memory Workshop (IMW)最新文献

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Characterization of a MEMS-Based Embedded Non Volatile Memory Array for Extreme Environments 极端环境下基于mems的嵌入式非易失性存储器阵列的特性研究
2011 3rd IEEE International Memory Workshop (IMW) Pub Date : 2011-05-22 DOI: 10.1109/IMW.2011.5873214
C. Zambelli, P. Olivo, R. Gaddi, C. Schepens, Charles Smith
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引用次数: 5
Physical Modeling and Control of Switching Statistics in PCM Arrays PCM阵列中开关统计量的物理建模与控制
2011 3rd IEEE International Memory Workshop (IMW) Pub Date : 2011-05-22 DOI: 10.1109/IMW.2011.5873230
A. Calderoni, M. Ferro, D. Ventrice, P. Fantini, D. Ielmini
{"title":"Physical Modeling and Control of Switching Statistics in PCM Arrays","authors":"A. Calderoni, M. Ferro, D. Ventrice, P. Fantini, D. Ielmini","doi":"10.1109/IMW.2011.5873230","DOIUrl":"https://doi.org/10.1109/IMW.2011.5873230","url":null,"abstract":"NA","PeriodicalId":261995,"journal":{"name":"2011 3rd IEEE International Memory Workshop (IMW)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133779887","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
A 10k-Cycling Reliable 90nm Logic NVM "eCFlash" (Embedded CMOS Flash) Technology 一种10k循环可靠的90nm逻辑NVM“eCFlash”(嵌入式CMOS闪存)技术
2011 3rd IEEE International Memory Workshop (IMW) Pub Date : 2011-05-22 DOI: 10.1109/IMW.2011.5873184
S. Shukuri, S. Shimizu, N. Ajika, T. Ogura, M. Mihara, Y. Kawajiri, K. Kobayashi, M. Nakashima
{"title":"A 10k-Cycling Reliable 90nm Logic NVM \"eCFlash\" (Embedded CMOS Flash) Technology","authors":"S. Shukuri, S. Shimizu, N. Ajika, T. Ogura, M. Mihara, Y. Kawajiri, K. Kobayashi, M. Nakashima","doi":"10.1109/IMW.2011.5873184","DOIUrl":"https://doi.org/10.1109/IMW.2011.5873184","url":null,"abstract":"NA","PeriodicalId":261995,"journal":{"name":"2011 3rd IEEE International Memory Workshop (IMW)","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133151208","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
Logic-Based Mega-Bit CuxSiyO emRRAM with Excellent Scalability Down to 22nm Node for post-emFLASH SOC Era 基于逻辑的百万比特CuxSiyO emRRAM，具有出色的可扩展性，可低至22nm节点，适用于后emflash SOC时代
2011 3rd IEEE International Memory Workshop (IMW) Pub Date : 2011-05-22 DOI: 10.1109/IMW.2011.5873218
Yanliang Wang, Lingming Yang, Ming Wang, W. Luo, R. Huang, Q. Zou, Jingang Wu, Beiyuan Hu, Yinyin Lin
{"title":"Logic-Based Mega-Bit CuxSiyO emRRAM with Excellent Scalability Down to 22nm Node for post-emFLASH SOC Era","authors":"Yanliang Wang, Lingming Yang, Ming Wang, W. Luo, R. Huang, Q. Zou, Jingang Wu, Beiyuan Hu, Yinyin Lin","doi":"10.1109/IMW.2011.5873218","DOIUrl":"https://doi.org/10.1109/IMW.2011.5873218","url":null,"abstract":"NA","PeriodicalId":261995,"journal":{"name":"2011 3rd IEEE International Memory Workshop (IMW)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124178360","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
A Novel Reconfigurable Sensing Scheme for Variable Level Storage in Phase Change Memory 相变存储器中可变电平存储的一种可重构传感新方案
2011 3rd IEEE International Memory Workshop (IMW) Pub Date : 2011-05-22 DOI: 10.1109/IMW.2011.5873227
Jing Li, Chao-I Wu, S. Lewis, J. Morrish, Tien-Yen Wang, R. Jordan, T. Maffitt, M. Breitwisch, A. Schrott, R. Cheek, H. Lung, Chung Lam
{"title":"A Novel Reconfigurable Sensing Scheme for Variable Level Storage in Phase Change Memory","authors":"Jing Li, Chao-I Wu, S. Lewis, J. Morrish, Tien-Yen Wang, R. Jordan, T. Maffitt, M. Breitwisch, A. Schrott, R. Cheek, H. Lung, Chung Lam","doi":"10.1109/IMW.2011.5873227","DOIUrl":"https://doi.org/10.1109/IMW.2011.5873227","url":null,"abstract":"NA","PeriodicalId":261995,"journal":{"name":"2011 3rd IEEE International Memory Workshop (IMW)","volume":"36 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124206075","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 21
Reset Current Reduction and Set-Reset Instabilities in Unipolar NiO RRAM 单极NiO RRAM中的复位电流减小和复位不稳定性
2011 3rd IEEE International Memory Workshop (IMW) Pub Date : 2011-05-22 DOI: 10.1109/IMW.2011.5873236
F. Nardi, C. Cagli, D. Ielmini, S. Spiga
{"title":"Reset Current Reduction and Set-Reset Instabilities in Unipolar NiO RRAM","authors":"F. Nardi, C. Cagli, D. Ielmini, S. Spiga","doi":"10.1109/IMW.2011.5873236","DOIUrl":"https://doi.org/10.1109/IMW.2011.5873236","url":null,"abstract":"NA","PeriodicalId":261995,"journal":{"name":"2011 3rd IEEE International Memory Workshop (IMW)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125978688","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Drift-Tolerant Multilevel Phase-Change Memory 容漂多电平相变存储器
2011 3rd IEEE International Memory Workshop (IMW) Pub Date : 2011-05-22 DOI: 10.1109/IMW.2011.5873231
N. Papandreou, Haralambos Pozidis, T. Mittelholzer, G. Close, M. Breitwisch, C. Lam, E. Eleftheriou
{"title":"Drift-Tolerant Multilevel Phase-Change Memory","authors":"N. Papandreou, Haralambos Pozidis, T. Mittelholzer, G. Close, M. Breitwisch, C. Lam, E. Eleftheriou","doi":"10.1109/IMW.2011.5873231","DOIUrl":"https://doi.org/10.1109/IMW.2011.5873231","url":null,"abstract":"NA","PeriodicalId":261995,"journal":{"name":"2011 3rd IEEE International Memory Workshop (IMW)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125537568","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 129
Modeling of the Forming Operation in HfO2-Based Resistive Switching Memories 基于hfo2的阻性开关存储器成形过程的建模
2011 3rd IEEE International Memory Workshop (IMW) Pub Date : 2011-05-22 DOI: 10.1109/IMW.2011.5873224
L. Vandelli, A. Padovani, G. Bersuker, D. Gilmer, P. Pavan, L. Larcher
{"title":"Modeling of the Forming Operation in HfO2-Based Resistive Switching Memories","authors":"L. Vandelli, A. Padovani, G. Bersuker, D. Gilmer, P. Pavan, L. Larcher","doi":"10.1109/IMW.2011.5873224","DOIUrl":"https://doi.org/10.1109/IMW.2011.5873224","url":null,"abstract":"NA","PeriodicalId":261995,"journal":{"name":"2011 3rd IEEE International Memory Workshop (IMW)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130949293","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 25
Effects of RRAM Stack Configuration on Forming Voltage and Current Overshoot RRAM堆叠结构对形成电压和电流超调的影响
2011 3rd IEEE International Memory Workshop (IMW) Pub Date : 2011-05-22 DOI: 10.1109/IMW.2011.5873225
D. Gilmer, G. Bersuker, Hyungyong Park, C. Park, B. Butcher, W. Wang, P. Kirsch, R. Jammy
{"title":"Effects of RRAM Stack Configuration on Forming Voltage and Current Overshoot","authors":"D. Gilmer, G. Bersuker, Hyungyong Park, C. Park, B. Butcher, W. Wang, P. Kirsch, R. Jammy","doi":"10.1109/IMW.2011.5873225","DOIUrl":"https://doi.org/10.1109/IMW.2011.5873225","url":null,"abstract":"NA","PeriodicalId":261995,"journal":{"name":"2011 3rd IEEE International Memory Workshop (IMW)","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133255845","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 69
Study of Pass-Gate Voltage (VPASS) Interference in Sub-30nm Charge-Trapping (CT) NAND Flash Devices 亚30nm电荷捕获(CT) NAND闪存器件中通栅电压(VPASS)干扰的研究
2011 3rd IEEE International Memory Workshop (IMW) Pub Date : 2011-05-22 DOI: 10.1109/IMW.2011.5873211
Y. Hsiao, H. Lue, Kuo-Pin Chang, C. Hsieh, T. Hsu, K. Hsieh, Chih-Yuan Lu
{"title":"Study of Pass-Gate Voltage (VPASS) Interference in Sub-30nm Charge-Trapping (CT) NAND Flash Devices","authors":"Y. Hsiao, H. Lue, Kuo-Pin Chang, C. Hsieh, T. Hsu, K. Hsieh, Chih-Yuan Lu","doi":"10.1109/IMW.2011.5873211","DOIUrl":"https://doi.org/10.1109/IMW.2011.5873211","url":null,"abstract":"NA","PeriodicalId":261995,"journal":{"name":"2011 3rd IEEE International Memory Workshop (IMW)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132166519","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
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