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A 2-ns, 5-mW, synchronous-powered static-circuit fully associative TLB 一个2ns, 5mw，同步供电的静态电路全关联TLB
Digest of Technical Papers., Symposium on VLSI Circuits. Pub Date : 1995-06-08 DOI: 10.1109/VLSIC.1995.520669
H. Higuchi, S. Tachibana, M. Minami, T. Nagano
{"title":"A 2-ns, 5-mW, synchronous-powered static-circuit fully associative TLB","authors":"H. Higuchi, S. Tachibana, M. Minami, T. Nagano","doi":"10.1109/VLSIC.1995.520669","DOIUrl":"https://doi.org/10.1109/VLSIC.1995.520669","url":null,"abstract":"Virtual memory is used in most high-performance computer systems to extend the address space. Virtual addresses are translated by the system into physical addresses at run-time. The translation is usually accelerated by special hardware called a translation look-aside buffer (TLB). Thus, TLBs are required for high-speed operation. In conventional high-speed TLBs, set-associative memories are utilized. But they need a large chip area. Fully associative TLBs which use content addressable memories (CAM) realize smaller chip areas. But slow circuit speed and large power dissipation are drawbacks in large entry-TLBs. This paper describes high-speed, low-power fully associative TLBs which do not need any signal lines added to conventional TLBs by using a newly developed matched signal and reference signal generator circuits.","PeriodicalId":256846,"journal":{"name":"Digest of Technical Papers., Symposium on VLSI Circuits.","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-06-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121092838","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
A stable programming pulse generator for high-speed programming single power supply voltage flash memories 一种稳定的编程脉冲发生器，用于高速编程的单电源电压闪存
Digest of Technical Papers., Symposium on VLSI Circuits. Pub Date : 1995-06-08 DOI: 10.1109/VLSIC.1995.520691
T. Tanzawa, T. Tanaka
{"title":"A stable programming pulse generator for high-speed programming single power supply voltage flash memories","authors":"T. Tanzawa, T. Tanaka","doi":"10.1109/VLSIC.1995.520691","DOIUrl":"https://doi.org/10.1109/VLSIC.1995.520691","url":null,"abstract":"This paper describes a stable programming pulse generator to reduce not only the pumping-up time under a low power supply voltage condition, but also the power consumption under a high power supply voltage condition. Moreover, the fluctuation of the programming pulse width is controlled within /spl plusmn/0.5% under the condition of a power supply voltage fluctuation of /spl plusmn/20%. As a result, the increase of the programming pulse width under the low voltage condition is eliminated, and the total programming time can be reduced by about 30%. Furthermore, the proposed 10/spl mu/s delay circuit area can be reduced to 42% of the conventional one.","PeriodicalId":256846,"journal":{"name":"Digest of Technical Papers., Symposium on VLSI Circuits.","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-06-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125263544","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Substrate noise reduction using active guard band filters in mixed-signal integrated circuits 混合信号集成电路中使用有源保护带滤波器的基板降噪
Digest of Technical Papers., Symposium on VLSI Circuits. Pub Date : 1995-06-08 DOI: 10.1109/VLSIC.1995.520675
Keiko Makie Fukuda, Satoshi Maeda, Toshiro Tsukada, Tatsuji Matsuura
{"title":"Substrate noise reduction using active guard band filters in mixed-signal integrated circuits","authors":"Keiko Makie Fukuda, Satoshi Maeda, Toshiro Tsukada, Tatsuji Matsuura","doi":"10.1109/VLSIC.1995.520675","DOIUrl":"https://doi.org/10.1109/VLSIC.1995.520675","url":null,"abstract":"A substrate noise reduction technique using an \"active guard band filter\", is developed for analog and digital mixed-signal integrated circuits. A noise cancellation signal generated by operational amplifiers is actively input into a guard band to cancel substrate noise. In a 0.8 /spl mu/m CMOS test chip, substrate noise was experimentally suppressed to less than 1% of the original non-canceled noise for frequencies below 1 MHz by using this technique.","PeriodicalId":256846,"journal":{"name":"Digest of Technical Papers., Symposium on VLSI Circuits.","volume":"96 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-06-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128500507","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 37
17 GHz-bandwidth 17 dB-gain 0.3 /spl mu/m-HEMT low-power limiting amplifier 17ghz带宽17db增益0.3 /spl mu/m-HEMT低功率限制放大器
Digest of Technical Papers., Symposium on VLSI Circuits. Pub Date : 1995-06-08 DOI: 10.1109/VLSIC.1995.520703
Zhigong Wang, M. Berroth, V. Hurm, M. Lang, U. Notwotny, P. Hofmann, A. Hulsmann, K. Kohler, B. Raynor, J. Schneider
{"title":"17 GHz-bandwidth 17 dB-gain 0.3 /spl mu/m-HEMT low-power limiting amplifier","authors":"Zhigong Wang, M. Berroth, V. Hurm, M. Lang, U. Notwotny, P. Hofmann, A. Hulsmann, K. Kohler, B. Raynor, J. Schneider","doi":"10.1109/VLSIC.1995.520703","DOIUrl":"https://doi.org/10.1109/VLSIC.1995.520703","url":null,"abstract":"The design of a limiting amplifier with a high speed, a high gain, and a wide dynamic range is a basic task for the realization of high-speed data transmission systems. A limiting amplifier fabricated using Si-bipolar technology can be operated at 15 Gb/s with a power consumption of 720 mW. An AlGaAs/GaAs HBT limiting amplifier can be operated up to 15 GHz with a power consumption of 1.5 W. The HEMT limiting amplifier presented in this paper shows a higher bandwidth but needs a much lower DC power.","PeriodicalId":256846,"journal":{"name":"Digest of Technical Papers., Symposium on VLSI Circuits.","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-06-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126954232","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
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