2016 IEEE 37th International Electronics Manufacturing Technology (IEMT) & 18th Electronics Materials and Packaging (EMAP) Conference最新文献

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Effects of sintering temperatures on microstructures and mechanical properties of Sn4.0Ag0.5Cu1.0Ni solder alloy 烧结温度对Sn4.0Ag0.5Cu1.0Ni钎料合金组织和力学性能的影响
N. Murad, S. Aisha, Mahadzir Ishak Muhammad
{"title":"Effects of sintering temperatures on microstructures and mechanical properties of Sn4.0Ag0.5Cu1.0Ni solder alloy","authors":"N. Murad, S. Aisha, Mahadzir Ishak Muhammad","doi":"10.1109/IEMT.2016.7761946","DOIUrl":"https://doi.org/10.1109/IEMT.2016.7761946","url":null,"abstract":"This research was carried out to investigate the effects of sintering temperature on the properties of Sn-4.0Ag-0.5Cu-1.0Ni solder alloy by varying the temperatures. The Sn-4.0Ag-0.5Cu-1.0Ni solder alloy was prepared by using powder metallurgy method by press and sinter routes. 99.9% of pure Sn, Ag, Cu and Ni powder were used in this research where the pre-mixed powder undergoing milling process for 6 hours using a planetary ball machine. Hydraulic press machine was used to compact the solder powder at identically 5 tons(125 bars) for all samples. Five different temperatures of sintering specifically at 120°C, 150°C, 180°C, 220°C and 250°C were used. Characterizations on the microstructures such as grain size, thickness of intermetallic compound and, wettability angle were carried out using Scanning Electron Microscopy. Meanwhile, properties of the solder alloy were also evaluated through hardness and tensile test. It is expected that sintering process could be able to improve the strength of the solder joint by decreasing the intermetallic compound grain size. So far, most papers commonly used 180°C as their sintering parameter without anyone providing the promising findings and various effects of the temperature onto solder. Therefore, this work is conducted to make a clarification and be the pilot study for the next sintering works for soldering. This paper reports experimental results of properties of Sn-4.0Ag-0.5Cu-1.0Ni solder alloy at different sintering temperatures.","PeriodicalId":237235,"journal":{"name":"2016 IEEE 37th International Electronics Manufacturing Technology (IEMT) & 18th Electronics Materials and Packaging (EMAP) Conference","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114916472","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
EMI shielding performance by metal plating on mold compound 模具复合镀层的电磁干扰屏蔽性能
M. Tai, Swee Leong Kok, K. Mukai
{"title":"EMI shielding performance by metal plating on mold compound","authors":"M. Tai, Swee Leong Kok, K. Mukai","doi":"10.1109/IEMT.2016.7761978","DOIUrl":"https://doi.org/10.1109/IEMT.2016.7761978","url":null,"abstract":"Conformal plating on mold compound is a new fabrication process technology, it offers new possibility for IC package design to improve features such as rigidization of the flexible core, heat sinking, 3D circuit patterning and EMI shielding. This fabrication technology had successfully demostrated a process which is able to achieve high reliable performance, as being proven to have high peeling strength and electrical consistency after sample had gone through the critical moisture and temperature cycle test. Following after the reliability test, this paper studies the shielding effectiveness of varying coating thickness with respect to laboratory simulated EMI condition using radio frequency from 10MHz to 5.8 GHz. Different metal namely pure nickel, nickel-phosphorous and pure plated copper are also being studies for their performance in the effectively of EMI sheilding.","PeriodicalId":237235,"journal":{"name":"2016 IEEE 37th International Electronics Manufacturing Technology (IEMT) & 18th Electronics Materials and Packaging (EMAP) Conference","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115680803","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Production challenges of TSOP Copper wire bonding TSOP铜线粘接的生产挑战
K. Loh, Y. Pan, C. E. Tan
{"title":"Production challenges of TSOP Copper wire bonding","authors":"K. Loh, Y. Pan, C. E. Tan","doi":"10.1109/IEMT.2016.7761949","DOIUrl":"https://doi.org/10.1109/IEMT.2016.7761949","url":null,"abstract":"With the Copper wire bonding already occupying majority of production lines, there are many significant factors continue to surface out. The Copper wire bonding has also becomes very susceptible to production variability of small leaded packages such as Thin Small Outline Package (TSOP). The TSOP utilizes thin and flimsy leadframes, causing a lot challenges at 2nd bond (stitch). The stitch bonding shows high occurrences of pre-mature failures or wire breaks, while struggling to maintain good stitch bonding strength. Furthermore, the inconsistent stitch bonding can also cause inconsistent tail formation, subsequently affecting the formation of Free Air Ball (FAB) and 1st bond quality. With many DOEs (Design of Experiments), several improvements were executed to address the stitch forming issues. Some of these major actions include optimizing several parameters such as the 2nd bond force, wire looping speed, wire loop mode change and wire sequencing. However, even with the implementation of these improvement actions, the Copper wire bonding performance was only improved by 50%. More comprehensive mapping was extended into possible impact of leadframe location and design. Surprisingly, die attach process was found to be the confounding with the leadframe design. It looks like wire stitch formation at ground lead is not consistent, mostly affected by the die attach epoxy bleed and outgas. In order to obtain more robust Copper wire bonding performance, the die attach process was optimized accordingly. Without losing any die attach quality, optimized process provided much larger operating margin for Copper wire bonding. All the combined improvements managed to eliminate wire break occurrence, while maintaining the good bonding strength of 1st and 2nd bonds. The lessons learnt were very important and already embedded to all new Copper wire bonding projects in order to realize 1st pass success into production mode.","PeriodicalId":237235,"journal":{"name":"2016 IEEE 37th International Electronics Manufacturing Technology (IEMT) & 18th Electronics Materials and Packaging (EMAP) Conference","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128425957","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Activity on arrow (AOA) network model to enable mold productivity optimization 箭头上的活动(AOA)网络模型,使模具生产率优化
Lim Ming Siong
{"title":"Activity on arrow (AOA) network model to enable mold productivity optimization","authors":"Lim Ming Siong","doi":"10.1109/IEMT.2016.7761987","DOIUrl":"https://doi.org/10.1109/IEMT.2016.7761987","url":null,"abstract":"This paper is to discuss an engineering optimization method to fully utilize the mold equipment and deliver its maximum productivity yet no compromising on both product and equipment quality. A network model, which using activity on arrow (AOA), is constructed for the activities in the entire molding process starting with loading till offloading of the magazine. The network becomes complicated when 2 mold presses are in production mode simultaneously where only a universal toolset, such as preheater and degator is required to accommodate both presses concurrently. In this case, slack times often happen where certain activities need to wait for the activities to complete before it starts. This non-productive waiting time is one of the seven wastes in lean manufacturing concept. A “dummy” is used to indicate as a precedence activity of another activity in this network model. By considering all the activities time of the entire network, the “critical path” can be identified. Critical path illustrate focus area of the entire mold process which reflecting the opportunity for productivity improvement. By tabulating down the time for each activity in the critical path, a decision can be made when the opportunity is identified. The model can be further expanded to 3 presses model where the critical path and the slack time vary accordingly. A simple program are developed with entry data of the mold equipment capability and process parameter to ease the calculation. The output of the program will present the critical path and expected crashing area.","PeriodicalId":237235,"journal":{"name":"2016 IEEE 37th International Electronics Manufacturing Technology (IEMT) & 18th Electronics Materials and Packaging (EMAP) Conference","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121294228","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Simulation of electromigration induced stress of solder 电迁移引起焊料应力的模拟
F. Su, X. Pan, Zheng Zhang, Q. Liu
{"title":"Simulation of electromigration induced stress of solder","authors":"F. Su, X. Pan, Zheng Zhang, Q. Liu","doi":"10.1109/IEMT.2016.7761935","DOIUrl":"https://doi.org/10.1109/IEMT.2016.7761935","url":null,"abstract":"In this paper, failure modes of solder under electromigration were shown, the failure mechanism was usually attributed to tensile stress at cathode and compressive stress at anode. To evaluate the electromigration induced stress in solder, a finite element model was developed basing on the coupling equation of stress-mass diffusion with the aid of user development on the platform of ABAQUS. Simulation precision of the finite element model was confirmed with analytical results of a benchmark problem first. Then electromigration induced stress in solder was instigated with the finite element model, the maximum sphere stress was found to be about 50 MPa. Vacancy density and its variation with time were also investigated, it was found that vacancy density at cathode increased with current stressing time. These results can be used to interpret the electromigration induced failure and provide a basis for comprehensive evaluation of solder reliability.","PeriodicalId":237235,"journal":{"name":"2016 IEEE 37th International Electronics Manufacturing Technology (IEMT) & 18th Electronics Materials and Packaging (EMAP) Conference","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121480124","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Comparison of advanced package warpage measurement metrologies 先进包装翘曲测量计量方法的比较
Ron W. Kultcrman, W. K. Loh, H. Fu, M. Tsuriya
{"title":"Comparison of advanced package warpage measurement metrologies","authors":"Ron W. Kultcrman, W. K. Loh, H. Fu, M. Tsuriya","doi":"10.1109/IEMT.2016.7761959","DOIUrl":"https://doi.org/10.1109/IEMT.2016.7761959","url":null,"abstract":"The metrology used to characterize, measure, and present the dynamic warpage of electronic packages as a function of temperature has become a critical tool in the electronics industry. Existing JEDEC standard JESD22-B112A lists the four metrologies of shadow moiré, digital fringe projection, confocal and digital image correlation. Each of these has distinct advantages and disadvantages depending on the required use model and application. A series of identical measurement scenarios was applied to each metrology in an attempt to establish constructive comparisons of capability and use across specific tools commonly used for each metrology today. Key parameters targeted in these evaluations included field of view (FOV), oven capabilities, measurement preparation and software capabilities. The intent is not to declare a best tool but rather to provide comparative aspects across the metrologies and tools for those considering a specific use model.","PeriodicalId":237235,"journal":{"name":"2016 IEEE 37th International Electronics Manufacturing Technology (IEMT) & 18th Electronics Materials and Packaging (EMAP) Conference","volume":"61 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114740674","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
Effect of the crystallinity of a grain boundary on the self-diffusion of copper in thin-film interconnections 晶界的结晶度对铜在薄膜互连中自扩散的影响
H. Sakamoto, Takeru Kato, Ken Suzuki, H. Miura
{"title":"Effect of the crystallinity of a grain boundary on the self-diffusion of copper in thin-film interconnections","authors":"H. Sakamoto, Takeru Kato, Ken Suzuki, H. Miura","doi":"10.1109/IEMT.2016.7761937","DOIUrl":"https://doi.org/10.1109/IEMT.2016.7761937","url":null,"abstract":"In this study, the effect of the crystallinity and the characteristics of grain boundaries on the grain boundary diffusion was investigated experimentally. The crystallinity and characteristics of the grain boundaries were evaluated by using an EBSD (Electron Back-scattered Diffraction) method. The atomic diffusion of the grain boundary was also observed as the change of the surface morphology of interconnections by SPM (Scanning Probe Microscopy). It was found that the main diffusion paths during EM (Electro Migration) was random grain boundaries. The grain boundaries with low quality, regardless of crystallographic orientation, were also the main atomic diffusion paths.","PeriodicalId":237235,"journal":{"name":"2016 IEEE 37th International Electronics Manufacturing Technology (IEMT) & 18th Electronics Materials and Packaging (EMAP) Conference","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124102016","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
High efficiency solution processable organic light emitting diode through materials and interfacial engineering 通过材料和界面工程高效解决可加工有机发光二极管
K. Woon, K. H. Yeoh, Calvin Yi Bin Ng, N. Talik, W. Wong, T. Whitcher, S. Chen, Z. Hasan, Nurul Nadiah Zakaria, Bee Kian Ong, A. Ariffin, R. Griniene, S. Grigalevicius, T. Saisopa, H. Nakajima, R. Supruangnet, P. Songsiriritthigul
{"title":"High efficiency solution processable organic light emitting diode through materials and interfacial engineering","authors":"K. Woon, K. H. Yeoh, Calvin Yi Bin Ng, N. Talik, W. Wong, T. Whitcher, S. Chen, Z. Hasan, Nurul Nadiah Zakaria, Bee Kian Ong, A. Ariffin, R. Griniene, S. Grigalevicius, T. Saisopa, H. Nakajima, R. Supruangnet, P. Songsiriritthigul","doi":"10.1109/IEMT.2016.7761953","DOIUrl":"https://doi.org/10.1109/IEMT.2016.7761953","url":null,"abstract":"Solution proceessable organic light emitting diodes (LEDs) requires multilevel approaches to achieve high efficiency. Time-Dependept Density Fuctional Theory method is carried to predict the molecular parameters such as triplet energies (ET) which are important to achieve high efficiency Organic LED. This will guide the material designs. Interfacial treatment at the anode and cathode can help improve the charge injection and charge balance. The use of Nafion to modify the workfunction of Pedot:PSS increased the device efficiency for the blue phosphorescent Organic LED while flourinated alcohol can be used to modify the cathode resulting almost double of efficiency for `super-yellow' poly-(p-phenylenevinylene) Orgnic LED. We also found out that the ET of the materials can be significantly influeced by the side groups and intermolecular distance. Multilayer Organic LED can be used to confine the recombination region resulting in little change of CIE-cordinate in a wide range of luminance. Solution processable Orgnic LEDs show great promise in lowering the manufacturing cost of Organic LEDs.","PeriodicalId":237235,"journal":{"name":"2016 IEEE 37th International Electronics Manufacturing Technology (IEMT) & 18th Electronics Materials and Packaging (EMAP) Conference","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128863794","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
QFN challenges: Second bond improvement to eliminate the weak stitch (fish tail) failure mechanism on pre plated lead frame QFN挑战:第二次键合改进,以消除预镀引线框架上的弱缝线(鱼尾)失效机制
Jacky Lee Sinn Fah, S. Sekaran, Rameish Rao Subarmaniyan, Camella Chee Guey Yong
{"title":"QFN challenges: Second bond improvement to eliminate the weak stitch (fish tail) failure mechanism on pre plated lead frame","authors":"Jacky Lee Sinn Fah, S. Sekaran, Rameish Rao Subarmaniyan, Camella Chee Guey Yong","doi":"10.1109/IEMT.2016.7761936","DOIUrl":"https://doi.org/10.1109/IEMT.2016.7761936","url":null,"abstract":"Most of the device's technology has been moving towards the complex and produce of Nano-IC with demands for cheaper cost, smaller size and better thermal and electrical performance. One of the marketable packages is Quad Flat No-Lead (QFN) package. Due to the high demand of miniaturization of electronic products, QFN development becomes more promising, such as the lead frame design with half edge, cheaper tape, shrinkage of package size as to achieve more units per lead frame (cost saving) and etc [1]. The improvement methods in the lead frame design, such as lead frame metal tie bar and half edge features are always the main challenges for QFN package. With reduced the size of metal tie bar, it will fasten the package singulation process, whereas the half edge is designed for the mold compound locking for delamination reduction purpose. This paper specifically will discuss how the critical wire bonding parameters, capillary design and environmental conditions interact each other result to the unstable leads (second bond failures). During the initial evaluation of new package SOT1261 with rough PPF lead frame, several short tails and fish tails observed on wedge bond when applied with the current parameter setting which have been qualified in other packages with same wire size (18um Au wire). These problems did not surface out in earlier qualified devices mainly due to the second bond parameter robustness, capillary designs, lead frame design changes, different die packages, lead frame batches and contamination levels. One of the main root cause been studied is the second bond parameter setting which is not robust enough for the flimsy lead frame. The new bonding methodology, with the concept of low base ultrasonic and high force setting applied together with scrubbing mechanism to eliminate the fish tail bond and also reduce short tail occurrence on wedge. Wire bond parameters optimized to achieve zero fish tail, and wedge pull reading with >4.0gf. Destructive test such as wedge pull test used to test the bonding quality. Failure modes are analyzed using high power optical scope microscope and Scanning Electronic Microscope (SEM). By looking through into all possible root causes, and identifying how the factors are interacting, some efforts on the Design of Experiments (DOE) are carried out and good solutions were implemented.","PeriodicalId":237235,"journal":{"name":"2016 IEEE 37th International Electronics Manufacturing Technology (IEMT) & 18th Electronics Materials and Packaging (EMAP) Conference","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115695089","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Electroless deposition of Nickel-Palladium-Gold for high reliability and power application: Cost and performance progress 高可靠性和功率应用的镍钯金化学沉积:成本和性能进展
B. Roelfs
{"title":"Electroless deposition of Nickel-Palladium-Gold for high reliability and power application: Cost and performance progress","authors":"B. Roelfs","doi":"10.1109/IEMT.2016.7761964","DOIUrl":"https://doi.org/10.1109/IEMT.2016.7761964","url":null,"abstract":"Electroless deposited metal stacks of Nickel-Palladium-Gold (ENEPIG) or Nickel-Palladium (ENEP) are frequently used in modern advanced packaging technologies. Main application for this metal stack is the under bump or pad metallization (fig1.). The surface of this specific metal stack allows for reliable wire bonding including thick Copper wire bonding as well as for soldering on the die. This technology has been successfully adopted by automobile suppliers as well as power chip manufacturers. Recently it has been introduced for housing redistribution layers of Copper (see fig. 2). In this paper we are presenting the latest improvements over the entire ENEP(IG) process leading to a substantial Cost of Ownership (CoO) reduction. Improvements span chemistry control, manufacturing process, the plating process itself and tool layout. We are discussing how this has been achieved and how strong this is influencing the cost for the overall process steps. Different tool concepts for the ENEPIG process will be discussed, with a focus on benefits of specific spray pre-treatment as this is a key enabler for fine line applications.","PeriodicalId":237235,"journal":{"name":"2016 IEEE 37th International Electronics Manufacturing Technology (IEMT) & 18th Electronics Materials and Packaging (EMAP) Conference","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129118257","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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