2016 11th International Conference on Industrial and Information Systems (ICIIS)最新文献_第6页

Development of low cost prosthetic limb using EMG signals for amputees 基于肌电信号的截肢者低成本假肢的研制

2016 11th International Conference on Industrial and Information Systems (ICIIS) Pub Date : 2016-12-01 DOI: 10.1109/ICIINFS.2016.8263036

Langri Dharminder Singh Tejinder Singh, Langri Dharminder Singh Tejinder Singh, S. Maddè, Sachin Rathod

{"title":"Development of low cost prosthetic limb using EMG signals for amputees","authors":"Langri Dharminder Singh Tejinder Singh, Langri Dharminder Singh Tejinder Singh, S. Maddè, Sachin Rathod","doi":"10.1109/ICIINFS.2016.8263036","DOIUrl":"https://doi.org/10.1109/ICIINFS.2016.8263036","url":null,"abstract":"The work presented in this paper is the first step in development of a prosthetic leg based on EMG signals for above knee amputees. The surface EMG signals picked up from the calf Muscles of healthy leg during the muscle activity are interfaced with a microcontroller using EMG acquisition system. These signals are processed, analyzed and used to actuate the knee joint of the prosthetic leg. During the course of the present work, it was possible to control the rotation of a motor of prosthetic knee joint using EMG signals from healthy leg. The Complete designed prosthesis will allow users to walk with a better pace. The main intention of this work is to develop the low cost prosthetic limb for amputees. EMG Signals were detected by sensors or electrodes. The amplitude of the surface EMG signal (SEMG) varies from the V to the few mV range. Based on the EMG signals a Microcontroller was programmed to perform toward and forward motion in steps depending on the dc voltage level. The levels of the dc voltage corresponding to the EMG signal were taken.","PeriodicalId":234609,"journal":{"name":"2016 11th International Conference on Industrial and Information Systems (ICIIS)","volume":"47 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128096641","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Extraction of life sign of human being hidden behind the wall 提取隐藏在墙后的人的生命迹象

2016 11th International Conference on Industrial and Information Systems (ICIIS) Pub Date : 2016-12-01 DOI: 10.1109/ICIINFS.2016.8263071

A. Gaikwad, K. Dongre

引用次数: 2

Narrow-band electrically small metamaterial-inspired antenna with bowtie-shaped stub for WLAN 用于WLAN的带有领结形短节的窄带电小型超材料启发天线

2016 11th International Conference on Industrial and Information Systems (ICIIS) Pub Date : 2016-12-01 DOI: 10.1109/ICIINFS.2016.8262903

Jai Deep Mulchandani, D. Gupta, S. K. Sharma, N. Mishra, R. Chaudhary

引用次数: 0

Image segmentation using encoder-decoder architecture and region consistency activation 使用编码器-解码器架构和区域一致性激活的图像分割

2016 11th International Conference on Industrial and Information Systems (ICIIS) Pub Date : 2016-12-01 DOI: 10.1109/ICIINFS.2016.8263033

D. Naik, C. Jaidhar

引用次数: 4

Characterization of log periodic planar dipole array antenna 对数周期平面偶极子阵列天线的特性

2016 11th International Conference on Industrial and Information Systems (ICIIS) Pub Date : 2016-12-01 DOI: 10.1109/ICIINFS.2016.8262905

S. Jain, S. S. Pawar

引用次数: 3

Review of features and machine learning techniques for web searching 回顾网络搜索的特征和机器学习技术

2016 11th International Conference on Industrial and Information Systems (ICIIS) Pub Date : 2016-12-01 DOI: 10.1109/ICIINFS.2016.8262957

N. Sharma, Rashi Agarwal, Narendra Kohli

引用次数: 2

A modified planar triangular monopole antenna for wide band applications 一种用于宽带应用的改进平面三角形单极天线

2016 11th International Conference on Industrial and Information Systems (ICIIS) Pub Date : 2016-12-01 DOI: 10.1109/ICIINFS.2016.8263009

S. Singh, Mahaveer Prasad Sharma, N. Kashyap

引用次数: 2

Ad-hoc on demand distance vector routing protocol using Dijkastra's algorithm (AODV-D) for high throughput in VANET (Vehicular Ad-hoc Network) 基于Dijkastra算法(AODV-D)的VANET (Vehicular Ad-hoc Network)高吞吐量随需应变距离矢量路由协议

2016 11th International Conference on Industrial and Information Systems (ICIIS) Pub Date : 2016-12-01 DOI: 10.1109/ICIINFS.2016.8262965

Chandresh Pathak, A. Shrivastava, Anjana Jain

{"title":"Ad-hoc on demand distance vector routing protocol using Dijkastra's algorithm (AODV-D) for high throughput in VANET (Vehicular Ad-hoc Network)","authors":"Chandresh Pathak, A. Shrivastava, Anjana Jain","doi":"10.1109/ICIINFS.2016.8262965","DOIUrl":"https://doi.org/10.1109/ICIINFS.2016.8262965","url":null,"abstract":"Past few decades have proved that the number of vehicles are increasing on road so we need some extra improvisation for our traffic safety need. The rise in vehicles count has led to a requirement for communication between vehicles. The emerging Vehicular ad hoc network (VANET) is a new class of wireless network, which offer intelligent transportation for the people on vehicle. Due to dynamic nature of traffic environment and very high mobility of vehicles, VANETs suffer link breakage problem. So in order to offer stable routes and establish good throughput in VANET, appropriate routing must be required. Many routing protocol are already available for efficient communication in Mobile ad hoc network (MANET) and one of those most important and efficient is Ad hoc on demand Distance Vector Routing (AODV) and it can be further used for communication and routing purpose in VANET environment. Due to different mobility and characteristic of MANET and VANET, AODV protocol does not perform well when we use existing AODV of MANET directly in VANET environment. So this paper presents optimization in route selection and route maintenance to get better stability of route and decrease overhead. Protocol proposed in this paper get improvement over previously proposed AODV protocol in terms of throughput, broken links.","PeriodicalId":234609,"journal":{"name":"2016 11th International Conference on Industrial and Information Systems (ICIIS)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116836822","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 11

Performance parameters optimization and implementation of adder/subtractor circuit using reversible logic approach 用可逆逻辑方法优化加/减电路的性能参数和实现

2016 11th International Conference on Industrial and Information Systems (ICIIS) Pub Date : 2016-12-01 DOI: 10.1109/ICIINFS.2016.8262959

Vandana Shukla, O. Singh, G. Mishra, R. Tiwari

{"title":"Performance parameters optimization and implementation of adder/subtractor circuit using reversible logic approach","authors":"Vandana Shukla, O. Singh, G. Mishra, R. Tiwari","doi":"10.1109/ICIINFS.2016.8262959","DOIUrl":"https://doi.org/10.1109/ICIINFS.2016.8262959","url":null,"abstract":"Arithmetic digital processing sub-systems are considered as one of the major component of any electronic computing system. The adder/subtractor circuit is one of the vital part of computing systems such as arithmetic logic unit of any computer. Moreover, urge of efficient low loss processing devices are the basic need of the time. This need is the basic motivation for researchers to progress in the field of reversible circuit design approach. Low power VLSI circuits, DNA computing, optical computing, signal processing, quantum computing and nanotechnology etc. are some of the progressive fields with the application of the reversible logic concepts. In this paper, we have proposed an approach to design n-bit adder/subtractor circuits with available reversible logic gates only. The proposed design is compared with existing designs based on some selected factors such as total number of reversible gates used in the design, garbage outputs generated and quantum cost of the design. Based on the proposed design approach, 8-bit adder-subtractor circuit using reversible approach is simulated and synthesised for Xilinx Spartan 3E with Device XC3S500E with 200 MHz frequency. Application of this optimized circuit may be visualized for the designing of low power processing devices.","PeriodicalId":234609,"journal":{"name":"2016 11th International Conference on Industrial and Information Systems (ICIIS)","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117197437","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

2×2 MIMO antenna for ISM band application 2×2用于ISM波段应用的MIMO天线

2016 11th International Conference on Industrial and Information Systems (ICIIS) Pub Date : 2016-12-01 DOI: 10.1109/ICIINFS.2016.8263047

L. Malviya, R. K. Panigrahi, M. V. Kartikeyan

引用次数: 11