2019 31st International Symposium on Power Semiconductor Devices and ICs (ISPSD)最新文献_第5页

Influence of External Gate Resistance on UIS Capability in Superjunction MOSFET 外部栅极电阻对超结MOSFET中UIS性能的影响

2019 31st International Symposium on Power Semiconductor Devices and ICs (ISPSD) Pub Date : 2019-05-01 DOI: 10.1109/ISPSD.2019.8757613

Masaaki Honda, Mizue Yamaji, Daisuke Arai, N. Suzuki, Takeshi Asada, W. Hirasawa, Takeshi Yamaguchi, Yuji Watanabe

{"title":"Influence of External Gate Resistance on UIS Capability in Superjunction MOSFET","authors":"Masaaki Honda, Mizue Yamaji, Daisuke Arai, N. Suzuki, Takeshi Asada, W. Hirasawa, Takeshi Yamaguchi, Yuji Watanabe","doi":"10.1109/ISPSD.2019.8757613","DOIUrl":"https://doi.org/10.1109/ISPSD.2019.8757613","url":null,"abstract":"We investigated the UIS capability for superjunction MOSFETs with respect to the external gate resistance (R<inf>g</inf>) and the charge imbalance (CIB) by experiments as well as device simulations. Measured UIS capability depends not only on the CIB but also on the R<inf>g</inf>. Higher UIS capability was exhibited for small R<inf>g</inf> than for large R<inf>g</inf> as deviating the CIB to <tex>$mathbf{Q}_{mathbf{n}} < mathbf{Q}_{mathbf{p}}$</tex> while the difference by R<inf>g</inf> was small for <tex>$mathbf{Q}_{mathbf{n}}=mathbf{Q}_{mathbf{p}}$</tex>. The device simulations indicated that the device destruction by UIS is assumed to be related to the re-conduction of channel current (I<inf>ch</inf>). When the R<inf>g</inf> is small, Ich turns off once while V<inf>ds</inf> has not increased enough to generate impact ionization. This transient behavior is different from the one for large R<inf>g</inf>. After that, Ich re-conduction occurs due to the high electric field beneath the MOS gate for <tex>$mathbf{Q}_{mathbf{n}}=mathbf{Q}_{mathbf{p}}$</tex> but suppressed for <tex>$mathbf{Q}_{mathbf{n}} < mathbf{Q}_{mathbf{p}}$</tex>. The graded doping for N-column which reduces phosphorus concentration near the surface helps to suppress the re-conduction and improves the UIS capability for small R<inf>g</inf> condition.","PeriodicalId":225029,"journal":{"name":"2019 31st International Symposium on Power Semiconductor Devices and ICs (ISPSD)","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126386953","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Experimental Study on the Effect of Recessed Gates in Drain STI Regions of nLDMOSFETs 凹槽栅极对nldmosfet漏极STI区影响的实验研究

2019 31st International Symposium on Power Semiconductor Devices and ICs (ISPSD) Pub Date : 2019-05-01 DOI: 10.1109/ISPSD.2019.8757573

T. Mori, H. Sayama, T. Ipposhi, Koji Iizuka

引用次数: 3

Trench Field Plate Engineering for High Efficient Edge Termination of 1200 V-class SiC Devices 1200个v级SiC器件高效边缘终端的沟槽场板工程

2019 31st International Symposium on Power Semiconductor Devices and ICs (ISPSD) Pub Date : 2019-05-01 DOI: 10.1109/ISPSD.2019.8757620

Yong Liu, Wentao Yang, Hao Feng, Y. Onozawa, S. Wakimoto, N. Fujishima, J. Sin

{"title":"Trench Field Plate Engineering for High Efficient Edge Termination of 1200 V-class SiC Devices","authors":"Yong Liu, Wentao Yang, Hao Feng, Y. Onozawa, S. Wakimoto, N. Fujishima, J. Sin","doi":"10.1109/ISPSD.2019.8757620","DOIUrl":"https://doi.org/10.1109/ISPSD.2019.8757620","url":null,"abstract":"Trench field plate engineering for high efficient edge termination of 1200 V-class SiC devices is proposed and experimentally demonstrated. The structure features a deep trench filled with benzocyclobutene (BCB) dielectric, and a U-shaped field plate is incorporated in the deep trench. The deep trench extends through the epitaxial layer into the substrate to eliminate the negative effects of the microtrench on breakdown voltage. The U-shaped field plate modulates the electric field distribution to prevent premature breakdown at the interface between the P-base and trench. The SiC outside the trench is diced away to reduce the peak electric field at the edge of the field plate by spreading the electrostatic potential both horizontally and vertically. The trench field plate edge termination structure is implemented by integrating with a PiN diode. Experimental results show that the structure achieves a breakdown voltage of 1380 V, which is approximately 100% of the ideal planar junction breakdown voltage of the PiN diode. The fabricated edge termination structure has an ultra-short width of $33 boldsymbol{mu} mathbf{m}$. Compared with conventional junction termination extension structures used in 1200 V-class SiC devices, the width of the proposed structure is approximately 75% shorter.","PeriodicalId":225029,"journal":{"name":"2019 31st International Symposium on Power Semiconductor Devices and ICs (ISPSD)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131317968","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 3

Over Kilovolt GaN Vertical Super-Junction Trench MOSFET: Approach for Device Design and Optimization 超千伏GaN垂直超结沟槽MOSFET:器件设计与优化方法

2019 31st International Symposium on Power Semiconductor Devices and ICs (ISPSD) Pub Date : 2019-05-01 DOI: 10.1109/ISPSD.2019.8757688

Peng Huang, Qi Zhou, Kuangli Chen, Xiaoqi Han, D. Wei, Yuanyuan Shi, Wanjun Chen, Bo Zhang

{"title":"Over Kilovolt GaN Vertical Super-Junction Trench MOSFET: Approach for Device Design and Optimization","authors":"Peng Huang, Qi Zhou, Kuangli Chen, Xiaoqi Han, D. Wei, Yuanyuan Shi, Wanjun Chen, Bo Zhang","doi":"10.1109/ISPSD.2019.8757688","DOIUrl":"https://doi.org/10.1109/ISPSD.2019.8757688","url":null,"abstract":"In this work, the fundamental concept of P/N-junction for voltage sustaining was introduced in GaN vertical device to push the BV of the device beyond kilovolts. Accordingly, a novel GaN vertical super-junction (SJ) trench MOSFET was proposed and studied by TCAD simulation. In order to realize the typical gradient doping transition stack of P+/P/N+in conventional Si-SJ structure, the P-GaN/UID-GaN/N+-GaN stack, where the top P-GaN and bottom N+-GaN act as the field-stop (FS) layer, is employed avoiding using the hardly achievable high quality P+-GaN. In order to mitigate the premature punch-through in the top P-GaN/N-drift junction due to the possible under design of the P-GaN thickness or the avalanche breakdown triggered by the high E-field due to the possible under design of the UID-GaN thickness, the device design scheme by obtaining a uniform E-field distribution at the P-GaN/UID-GaN/N+-GaN to N-drift region interface is proposed. By optimizing the thickness ratio of P-GaN to UID-GaN, the balance between the top punch-through and bottom avalanche can be obtained, which enables achieving the maximum overall BV of the GaN SJ-MOS with a given total thickness of N-GaN drift region. The proposed device structure and the methodology of device design are of great interests for GaN vertical device to achieve kilovolts BV for ultra-high power electronics.","PeriodicalId":225029,"journal":{"name":"2019 31st International Symposium on Power Semiconductor Devices and ICs (ISPSD)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123900629","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

Determination of the Transient Threshold Voltage Hysteresis in SiC MOSFETs after Positive and Negative Gate Bias 正负栅极偏置后SiC mosfet瞬态阈值电压滞回的测定

2019 31st International Symposium on Power Semiconductor Devices and ICs (ISPSD) Pub Date : 2019-05-01 DOI: 10.1109/ISPSD.2019.8757661

Christian Unger, M. Pfost

引用次数: 9

Full-chip simulation analysis of power MOSFET's during unclamped inductive switching with physics-base device models 基于物理器件模型的非箝位电感开关过程中功率MOSFET的全芯片仿真分析

2019 31st International Symposium on Power Semiconductor Devices and ICs (ISPSD) Pub Date : 2019-05-01 DOI: 10.1109/ISPSD.2019.8757577

T. Kachi, K. Eikyu, Takashi Saito

引用次数: 2

[Copyright notice] (版权)

2019 31st International Symposium on Power Semiconductor Devices and ICs (ISPSD) Pub Date : 2019-05-01 DOI: 10.1109/ispsd.2019.8757680

引用次数: 0

The Lowest On-Resistance and Robust 130nm BCDMOS Technology implementation utilizing HFP and DPN for mobile PMIC applications 利用HFP和DPN的最低导通电阻和稳健的130nm BCDMOS技术实现，用于移动PMIC应用

2019 31st International Symposium on Power Semiconductor Devices and ICs (ISPSD) Pub Date : 2019-05-01 DOI: 10.1109/ISPSD.2019.8757571

Dae-hwan Kim, Kuemju Lee, Jaeeuk Kim, Junghun Choi, JaeHee Lee, I. Cho

引用次数: 7

Design Considerations for High Voltage SiC Power Devices: An Experimental Investigation into Channel Pinching of 10kV SiC Junction Barrier Schottky (JBS) Diodes 高压SiC功率器件的设计考虑:10kV SiC结势垒肖特基(JBS)二极管通道箝位的实验研究

2019 31st International Symposium on Power Semiconductor Devices and ICs (ISPSD) Pub Date : 2019-05-01 DOI: 10.1109/ISPSD.2019.8757593

Jusitn Lynch, Nick Yun, Woongje Sung

引用次数: 5

Cu Double Side Plating Technology for High Performance and Reliable Si Power Devices 高性能可靠硅功率器件的双面镀铜技术

2019 31st International Symposium on Power Semiconductor Devices and ICs (ISPSD) Pub Date : 2019-05-01 DOI: 10.1109/ISPSD.2019.8757691

H. Kobayashi, T. Ohguro, T. Kai, Takako Motai, M. Ogawa, M. Matsuo, Kenichi Oohashi, Shinsuke Kozumi, Y. Takada, Hideharu Kojima, Shingo Masuko, Naoki Yonezawa, Akira Komatsu, T. Nishiwaki, T. Hara, M. Takahashi, A. Ezaki, K. Ohtsuka, S. Inumiya, K. Suguro

引用次数: 2