Full-chip simulation analysis of power MOSFET's during unclamped inductive switching with physics-base device models

Abstract

To clarify current and temperature distribution inside single power MOSFET chip, we have developed technology-based computer-aided-design (TCAD)-based, full-chip transient-analysis framework. In conventional design, a single power device chip is assumed as a “lumped element” i.e. a spatial distribution inside each device is neglected. In some cases, the assumption is inadequate. So, we have constructed a simulation framework that takes into account the RC distributions inside a chip, and analyzed the internal state of power MOSFET chips during unclamped inductive switching (UIS).