Proceedings of 5th International Symposium on the Physical and Failure Analysis of Integrated Circuits最新文献

Analysis of HBM and MM ESD failures in nMOS devices nMOS器件中HBM和MM ESD失效分析

Proceedings of 5th International Symposium on the Physical and Failure Analysis of Integrated Circuits Pub Date : 1995-11-27 DOI: 10.1109/IPFA.1995.487606

M. Beh, C. Kang, M. Natarajan, M. Radhakrishnan

引用次数: 2

Monitoring partially-cured epoxy adhesives in disk-drive sub-assembly by thermal analysis (TA) techniques 用热分析(TA)技术监测磁盘驱动器组件中部分固化环氧胶粘剂

Proceedings of 5th International Symposium on the Physical and Failure Analysis of Integrated Circuits Pub Date : 1995-11-27 DOI: 10.1109/IPFA.1995.487620

S. Chew, A. Sim

引用次数: 3

Design for and the control of the channel and 1/f noise in GaAs MESFET's GaAs MESFET中通道和1/f噪声的设计与控制

Proceedings of 5th International Symposium on the Physical and Failure Analysis of Integrated Circuits Pub Date : 1995-11-27 DOI: 10.1109/IPFA.1995.487617

K. T. Yan, L. Forbes

引用次数: 1

A new type of local defects in very thin silicon dioxide films on arsenic-implanted p-type silicon 砷注入p型硅上极薄二氧化硅薄膜的一种新型局部缺陷

Proceedings of 5th International Symposium on the Physical and Failure Analysis of Integrated Circuits Pub Date : 1995-11-27 DOI: 10.1109/IPFA.1995.487611

W. S. Lau, K. Pey, W. Ng, V. Sane, J.M.C. Heng, J. Phang, D. Chan, C. Chua, B. Cronquist, B. Lee

{"title":"A new type of local defects in very thin silicon dioxide films on arsenic-implanted p-type silicon","authors":"W. S. Lau, K. Pey, W. Ng, V. Sane, J.M.C. Heng, J. Phang, D. Chan, C. Chua, B. Cronquist, B. Lee","doi":"10.1109/IPFA.1995.487611","DOIUrl":"https://doi.org/10.1109/IPFA.1995.487611","url":null,"abstract":"Local oxide defects in thin silicon dioxide films thermally grown on arsenic-implanted n/sup +/ layer on a p-type Si substrate as well as on a plain p-type substrate were studied with the EBIC/TCM (Electron Beam Induced Current/Tunneling Current Microscopy) technique. We have captured the EBIC micrographs and the EBIC linescans for the defects. A new type of local oxide defect was observed with the property that the TOEBIC (True Oxide EBIC) contrast and the TCM contrast are of the same polarity. This is not the same as the more usual type of oxide defects, which have opposite TOEBIC and TCM contrast. The more usual type of local oxide defects can be found in silicon dioxide films thermally grown on p-type Si substrate with or without the n/sup +/ implanted layer. However, the new type of local oxide defects can be found only in thin silicon dioxide films thermally grown on arsenic-implanted n/sup +/ layer on a p-type Si substrate. A tentative explanation was proposed to explain our experimental observations.","PeriodicalId":216880,"journal":{"name":"Proceedings of 5th International Symposium on the Physical and Failure Analysis of Integrated Circuits","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-11-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114543926","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Power-on contention: a reliability issue for logic devices 上电争用:逻辑设备的可靠性问题

Proceedings of 5th International Symposium on the Physical and Failure Analysis of Integrated Circuits Pub Date : 1995-11-27 DOI: 10.1109/IPFA.1995.487589

R. Muniandy, S. Miller, Lim Yew Tee, R. Boylan

引用次数: 1

MOS transistor gate oxide breakdown stress dependence and their related models MOS晶体管栅极氧化物击穿应力依赖性及其相关模型

Proceedings of 5th International Symposium on the Physical and Failure Analysis of Integrated Circuits Pub Date : 1995-11-27 DOI: 10.1109/IPFA.1995.487609

T. Yeoh, R. Nair, Shze-Jer Hu

引用次数: 5

Fault isolation on mixed signal device 混合信号装置的故障隔离

Proceedings of 5th International Symposium on the Physical and Failure Analysis of Integrated Circuits Pub Date : 1995-11-27 DOI: 10.1109/IPFA.1995.487598

K. Tan, S. H. Ong, C.T. Yong

引用次数: 0

Designing and building-in reliability in advanced microelectronic assemblies and structures 设计和建立在可靠性的先进微电子组件和结构

Proceedings of 5th International Symposium on the Physical and Failure Analysis of Integrated Circuits Pub Date : 1995-11-27 DOI: 10.1109/IPFA.1995.487588

John W. Evans, J. Y. Evans, Byung Kil Yu

{"title":"Designing and building-in reliability in advanced microelectronic assemblies and structures","authors":"John W. Evans, J. Y. Evans, Byung Kil Yu","doi":"10.1109/IPFA.1995.487588","DOIUrl":"https://doi.org/10.1109/IPFA.1995.487588","url":null,"abstract":"New technologies in electronics require that product development embrace the paradigms of design for reliability and built-in reliability. These paradigms require effective measures to create robust designs and manufacturing processes. This objective must be achieved through modeling failure processes and taking proactive steps early in the development. Following an assessment of material properties, finite element models are built of key structures in the system. A statistical experimental design is then developed. This statistically designed \"virtual experiment\" will include the geometrical and materials variables comprising the system and a damage model such as a fatigue prediction model. Information for process development or improvement is derived from the virtual experiment. The statistical model is then embedded in a Monte Carlo simulation to assess the impact of uncertainty and variability. This process of stochastic physics of failure is the subject of this paper. The process will be described and an application of this systems engineering based approach to micro-via interconnect reliability, in a complex multi-chip module, will be presented.","PeriodicalId":216880,"journal":{"name":"Proceedings of 5th International Symposium on the Physical and Failure Analysis of Integrated Circuits","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-11-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126454705","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 19

A comparative study on the channel hot-carrier degradation of N- and P-MOSFETs with CVD tungsten polycide gate 用CVD聚钨栅极对N-和p - mosfet的沟道热载子降解进行了比较研究

Proceedings of 5th International Symposium on the Physical and Failure Analysis of Integrated Circuits Pub Date : 1995-11-27 DOI: 10.1109/IPFA.1995.487604

C. Lou, W. Chim, D. Chan, Y. Pan

{"title":"A comparative study on the channel hot-carrier degradation of N- and P-MOSFETs with CVD tungsten polycide gate","authors":"C. Lou, W. Chim, D. Chan, Y. Pan","doi":"10.1109/IPFA.1995.487604","DOIUrl":"https://doi.org/10.1109/IPFA.1995.487604","url":null,"abstract":"The channel hot-carrier induced degradation of polysilicon (PolySi) and tungsten polycide (WSi/sub x/) gate nMOSFETs and pMOSFETs are studied using the charge-pumping (CP) technique. WSi/sub x/ nMOSFETs under maximum substrate current (I/sub sub,max/) stress (V/sub g//spl sime/V/sub d//2) are degraded to a smaller extent when compared to the PolySi nMOSFETs. From the CP measurements, it is confirmed that fewer interface traps (N/sub it/) are generated for the WSi/sub x/ devices. However, under maximum gate current (I/sub g,max/) stress (V/sub g/=V/sub d/), the WSi/sub x/ nMOSFETs showed higher degradation than the PolySi devices. In contrast, WSi/sub x/ pMOSFETs showed higher degradation when compared to the PolySi devices under both the I/sub g,max/ and I/sub sub,max/ stresses. The CP results showed that more N/sub it/ and N/sub ox/ (negative oxide trapped charges) are present in the WSi/sub x/ pMOSFETs when compared with the PolySi devices. Finally, the operation of WSi/sub x/ CMOS transistors is found to be limited by the hot-carrier lifetime of WSi/sub x/ pMOSFETs.","PeriodicalId":216880,"journal":{"name":"Proceedings of 5th International Symposium on the Physical and Failure Analysis of Integrated Circuits","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-11-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121574052","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Reliability assessment of EPROM memory retention for wafer level sort programming 用于晶片级排序编程的EPROM存储器保留可靠性评估

Proceedings of 5th International Symposium on the Physical and Failure Analysis of Integrated Circuits Pub Date : 1995-11-27 DOI: 10.1109/IPFA.1995.487625

T. Yeoh, Shze-Jer Hu

引用次数: 0