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Proceedings of 5th International Symposium on the Physical and Failure Analysis of Integrated Circuits最新文献

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Imaging of charging specimens at high beam energies in the SEM 扫描电镜中高能束流下带电试样的成像
Proceedings of 5th International Symposium on the Physical and Failure Analysis of Integrated Circuits Pub Date : 1995-11-27 DOI: 10.1109/IPFA.1995.487595
W. Wong, J. Phang, J. Thong
{"title":"Imaging of charging specimens at high beam energies in the SEM","authors":"W. Wong, J. Phang, J. Thong","doi":"10.1109/IPFA.1995.487595","DOIUrl":"https://doi.org/10.1109/IPFA.1995.487595","url":null,"abstract":"This paper describes a novel method to observe charging specimens at high beam voltages without specimen preparation. It was found that the technique greatly reduces charging artifacts such as raster faults, discharge streaks, astigmatism and defocussing without sacrificing image quality. Images obtained of uncoated specimens are found to be comparable to gold-coated specimens and without charging effects.","PeriodicalId":216880,"journal":{"name":"Proceedings of 5th International Symposium on the Physical and Failure Analysis of Integrated Circuits","volume":"38 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-11-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125834507","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Active Idd consumption test in 4Meg DRAM failure analysis 4Meg DRAM故障分析中的主动Idd消耗测试
Proceedings of 5th International Symposium on the Physical and Failure Analysis of Integrated Circuits Pub Date : 1995-11-27 DOI: 10.1109/IPFA.1995.487597
A. Chan, D.L.T. Wai, W. Tan, E. Durai
{"title":"Active Idd consumption test in 4Meg DRAM failure analysis","authors":"A. Chan, D.L.T. Wai, W. Tan, E. Durai","doi":"10.1109/IPFA.1995.487597","DOIUrl":"https://doi.org/10.1109/IPFA.1995.487597","url":null,"abstract":"Active current consumption testing measures the current of the device while in active operation. During device operation, the device transistors switch from one state to another as the input signal propagates through the device. Eventually, the signal would have completed triggering the transistors and reach steady state condition. In this paper, the analysis was done on 4meg dram using 0.6 micron CMOS technology. Idd consumption testing has been more successful in CMOS devices due to its complementary arrangement of transistors. At steady state, one of the transistors will be \"shorted\" to either Vdd or Vss, while the other complementary transistor is \"open\". Any defect that exists resulting in a bridging or open fault at the transistors would give an abnormal steady state current. In bridging fault, the current increase can be milliamps from the nanoamps of steady state current. Open faults normally leads to a stuck-at fault. In the case of open, it is dependant on how the defective transistors affect the next stage of transistors or circuits.","PeriodicalId":216880,"journal":{"name":"Proceedings of 5th International Symposium on the Physical and Failure Analysis of Integrated Circuits","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-11-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125849351","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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