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Proceedings of the 2018 on Great Lakes Symposium on VLSI最新文献

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A Distributed Power Grid Analysis Framework from Sequential Stream Graph 基于顺序流图的分布式电网分析框架
Proceedings of the 2018 on Great Lakes Symposium on VLSI Pub Date : 2018-05-30 DOI: 10.1145/3194554.3194560
Chun-Xun Lin, Tsung-Wei Huang, T. Yu, Martin D. F. Wong
{"title":"A Distributed Power Grid Analysis Framework from Sequential Stream Graph","authors":"Chun-Xun Lin, Tsung-Wei Huang, T. Yu, Martin D. F. Wong","doi":"10.1145/3194554.3194560","DOIUrl":"https://doi.org/10.1145/3194554.3194560","url":null,"abstract":"The ever-increasing design complexities have overwhelmed what is offered by existing EDA tools. As a result, the recent EDA industry is driving the need for distributed computing to leverage large-scale compute-intensive problems, in particular, power grid analysis. In this paper, we introduce a distributed power grid analysis framework based on the stream graph model. We show that the stream graph model has better programmability over the MPI and enables flexible domain decomposition without limited by hardware resource. In addition, we design an efficient scheduling policy for this particular workload to maximize the cluster utilization to improve the performance. The experimental results demonstrated the promising performance of our framework that scales from single multi-core machines to a distributed computer cluster.","PeriodicalId":215940,"journal":{"name":"Proceedings of the 2018 on Great Lakes Symposium on VLSI","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-05-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126877827","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Efficient Wireless Power Transfer for Heterogeneous Adaptive IoT Systems 异构自适应物联网系统的高效无线电力传输
Proceedings of the 2018 on Great Lakes Symposium on VLSI Pub Date : 2018-05-30 DOI: 10.1145/3194554.3194605
Inna Partin-Vaisband
{"title":"Efficient Wireless Power Transfer for Heterogeneous Adaptive IoT Systems","authors":"Inna Partin-Vaisband","doi":"10.1145/3194554.3194605","DOIUrl":"https://doi.org/10.1145/3194554.3194605","url":null,"abstract":"To support the demand for energy autonomy, many of the future IoT edge devices will be powered from non-conventional, energy harvesting and wireless power sources. While convenient, sustainable, and robust, wireless power transfer (WPT) exhibits limited efficiency compared with the traditional wired power approaches, presenting a primary design challenge for practical IoT systems. Non-radiative mid-range WPT from a single power source to several power loads and from several power sources to a single power load has recently been experimentally demonstrated. Alternatively, WPT among multiple, simultaneously transmitting and receiving devices is a primary concern in future IoT systems with numerous interconnected heterogeneous objects. Furthermore, the dynamic nature of certain distributed IoT systems has a significant effect on WPT interactions among the numerous, mobile in space power devices. WPT that exploits the lossless characteristics of strong-coupled resonant regime is explored in this work as a method for efficiently transferring power among multiple, dynamically connected and disconnected IoT end devices. The efficiency of the power transfer is investigated in dense and sparse IoT systems in terms of the number of IoT devices located within limited space. Based on the results of this work, interactions among wirelessly powered devices have significant effect on the power transfer. Efficiency of power transfer increases with increasing transmitter-receiver coupling. Alternatively, densely clustered power transmitters or receivers may degrade the system-wide power transfer and efficiency. Intuition behind systematically optimized utilization of the WPT-based energy budget in future IoT systems is also provided.","PeriodicalId":215940,"journal":{"name":"Proceedings of the 2018 on Great Lakes Symposium on VLSI","volume":"61 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-05-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131011967","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Low Power and Trusted Machine Learning 低功耗和可信机器学习
Proceedings of the 2018 on Great Lakes Symposium on VLSI Pub Date : 2018-05-30 DOI: 10.1145/3194554.3216321
Avesta Sasan, Qi Zu, Yanzhi Wang, Jae-sun Seo, T. Mohsenin
{"title":"Low Power and Trusted Machine Learning","authors":"Avesta Sasan, Qi Zu, Yanzhi Wang, Jae-sun Seo, T. Mohsenin","doi":"10.1145/3194554.3216321","DOIUrl":"https://doi.org/10.1145/3194554.3216321","url":null,"abstract":"In this special discussion session on machine learning, the panel members discuss various issues related to building secure and low power neuromorphic systems. The security of neuromorphic systems may be discussed in term of the reliability of the model, trust in the model, and security of the underlying hardware. The low power aspect of neuromorphic computing systems may be discussed in terms of adaptation of new devices and technologies, the adaptation of new computational models, development of heterogeneous computing frameworks, or dedicated engines for processing neuromorphic models. This session may include discussion on the design space of such supporting hardware, exploring tradeoffs between power/energy, security, scalability, hardware area, performance, and accuracy.","PeriodicalId":215940,"journal":{"name":"Proceedings of the 2018 on Great Lakes Symposium on VLSI","volume":"80 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-05-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129377831","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
SEPUFSoC
Proceedings of the 2018 on Great Lakes Symposium on VLSI Pub Date : 2018-05-30 DOI: 10.1145/3194554.3194562
J. Sepúlveda, Felix Willgerodt, M. Pehl
{"title":"SEPUFSoC","authors":"J. Sepúlveda, Felix Willgerodt, M. Pehl","doi":"10.1145/3194554.3194562","DOIUrl":"https://doi.org/10.1145/3194554.3194562","url":null,"abstract":"A persistent problem for modern Multi-Processors System-on-Chip (MPSoCs) is their vulnerability to code injection attacks. By tampering with the memory content, attackers are able to extract secrets from the MPSoC and to modify or deny the MPSoC's operation. This work proposes SEPUFSoC (Secure PUF-based SoC), a novel flexible, secure, and fast architecture able to be integrated into any MPSoC. SEPUFSoC prevents execution of unauthorized code as well as data manipulation by ensuring memory integrity and authentication. SEPUFSoC achieves: i) efficiency, through the integration of a fast and lightweight hash function for Message Authentication Code (MAC) generation and integrity verification of the memory lines at runtime; and ii) lightweight security, through the use of a Physical Unclonable Function (PUF) to securely generate and store the cryptographic keys that are used for the authentication of each application. We discuss the security and performance of SEPUFSoC for single core and multi-core systems. Results show that the SEPUFSoC is a secure, fast, and low overhead solution for MPSoCs.","PeriodicalId":215940,"journal":{"name":"Proceedings of the 2018 on Great Lakes Symposium on VLSI","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-05-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124334208","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
Quasi-self-powered Infrastructural Internet of Things: The Mackinac Bridge Case Study 准自供电基础设施物联网:Mackinac大桥案例研究
Proceedings of the 2018 on Great Lakes Symposium on VLSI Pub Date : 2018-05-30 DOI: 10.1145/3194554.3194622
K. Aono, Hassene Hasni, O. Pochettino, N. Lajnef, S. Chakrabartty
{"title":"Quasi-self-powered Infrastructural Internet of Things: The Mackinac Bridge Case Study","authors":"K. Aono, Hassene Hasni, O. Pochettino, N. Lajnef, S. Chakrabartty","doi":"10.1145/3194554.3194622","DOIUrl":"https://doi.org/10.1145/3194554.3194622","url":null,"abstract":"Autonomous, continuous and long-term monitoring systems are required to prognosticate failures in civil infrastructures due to material fatigue or extreme events like earthquakes. While current battery-powered wireless sensors can evaluate the condition of the structure at a given instant of time, they require frequent replacement of batteries due to the need for continuous or frequent sampling. On the other hand, self-powered sensors can continuously monitor the structural condition without the need for any maintenance; however, the scarcity of harvested power limits the range at which the sensors could be wirelessly interrogated. In this paper, we propose a quasi-self-powered sensor that combines the benefits of self-powered sensing and with the benefits of battery-powered wireless transmission. By optimizing both of the functionalities, a complete sensor system can be designed that can continuously operate between the structure's maintenance life-cycles and can be wirelessly interrogated at distances that obviates the need for taking the structure out-of-service. As a case study, in this paper we present the design considerations involved in prototyping quasi-self-powered sensors for deployment on the Mackinac Bridge in northern Michigan, with a target operational life span greater than 20 years.","PeriodicalId":215940,"journal":{"name":"Proceedings of the 2018 on Great Lakes Symposium on VLSI","volume":"478 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-05-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133695713","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
Effective In-Situ Chip Health Monitoring with Selective Monitor Insertion Along Timing Paths 有效的原位芯片健康监测与选择性监视器插入沿时序路径
Proceedings of the 2018 on Great Lakes Symposium on VLSI Pub Date : 2018-05-30 DOI: 10.1145/3194554.3194563
H. A. Balef, H. Fatemi, K. Goossens, J. P. D. Gyvez
{"title":"Effective In-Situ Chip Health Monitoring with Selective Monitor Insertion Along Timing Paths","authors":"H. A. Balef, H. Fatemi, K. Goossens, J. P. D. Gyvez","doi":"10.1145/3194554.3194563","DOIUrl":"https://doi.org/10.1145/3194554.3194563","url":null,"abstract":"In-situ delay monitoring is an advanced technique to monitor the robustness of digital circuits. Conventionally, in-situ delay monitors are inserted at the end-points of timing paths. To reduce the number of monitors and to increase their observability, intermediate points have been considered. In sharp contrast to these works, we propose a low overhead technique where the insertion points are selected along the timing paths such that timing violations can be predicted without false negative detections. With our approach, the number of required monitors is reduced by up to 11X compared to end-point insertion techniques. The observability to delay degradation is 8X better with our approach, compared to techniques with straight monitor placement at intermediate points.","PeriodicalId":215940,"journal":{"name":"Proceedings of the 2018 on Great Lakes Symposium on VLSI","volume":"39 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-05-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122498192","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Optimal Topology-Aware PV Panel Floorplanning with Hybrid Orientation 具有混合方向的最优拓扑感知光伏板平面规划
Proceedings of the 2018 on Great Lakes Symposium on VLSI Pub Date : 2018-05-30 DOI: 10.1145/3194554.3194646
S. Vinco, E. Macii, M. Poncino
{"title":"Optimal Topology-Aware PV Panel Floorplanning with Hybrid Orientation","authors":"S. Vinco, E. Macii, M. Poncino","doi":"10.1145/3194554.3194646","DOIUrl":"https://doi.org/10.1145/3194554.3194646","url":null,"abstract":"Despite of being one of the most widespread green energy sources, the efficiency of PV rooftop installations is still repressed by shading and by the absence of a rigorous irradiance-aware placement approach. The goal of this work is to reach optimal energy production via an irregular placement of PV modules, by considering two degrees of freedom: orientation of each PV module and topology. Experimental results will prove the effectiveness of the proposed solution onto two real world case studies, with an increase of power production of up to 40%.","PeriodicalId":215940,"journal":{"name":"Proceedings of the 2018 on Great Lakes Symposium on VLSI","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-05-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116911239","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Session details: Special Session 2: Emergence of Silicon Photonics in High-Performance Computing: How can the VLSI Community Contribute 特别会议2:硅光子学在高性能计算中的出现:超大规模集成电路社区如何做出贡献
Proceedings of the 2018 on Great Lakes Symposium on VLSI Pub Date : 2018-05-30 DOI: 10.1145/3252915
M. Nikdast
{"title":"Session details: Special Session 2: Emergence of Silicon Photonics in High-Performance Computing: How can the VLSI Community Contribute","authors":"M. Nikdast","doi":"10.1145/3252915","DOIUrl":"https://doi.org/10.1145/3252915","url":null,"abstract":"","PeriodicalId":215940,"journal":{"name":"Proceedings of the 2018 on Great Lakes Symposium on VLSI","volume":"67 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-05-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129675461","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
AEAS - Towards High Energy-efficiency Design for OpenSSL Encryption Acceleration through HW/SW Co-design AEAS -通过硬件/软件协同设计实现OpenSSL加密加速的高能效设计
Proceedings of the 2018 on Great Lakes Symposium on VLSI Pub Date : 2018-05-30 DOI: 10.1145/3194554.3194584
Chunhua Xiao, Yuhua Xie, Lei Zhang
{"title":"AEAS - Towards High Energy-efficiency Design for OpenSSL Encryption Acceleration through HW/SW Co-design","authors":"Chunhua Xiao, Yuhua Xie, Lei Zhang","doi":"10.1145/3194554.3194584","DOIUrl":"https://doi.org/10.1145/3194554.3194584","url":null,"abstract":"Entering the Big Data Era leads to the rapid development of web applications which provide high performance sensitive access on large data centers. OpenSSL has been widely deployed as a freely available implementation of SSL/TLS protocol that secures transactions over the Internet. In order to accelerate the speed of OpenSSL, many alternative encryption approaches are designed. However, energy consumption has been ignored in the rush for performance. Energy efficiency becomes a challenge with the increasing demands for performance and energy saving in data centers. In this paper, we present the Adaptive Encryption Acceleration System (AEAS), an OpenSSL encryption acceleration scheme. It provides high energy-efficiency encryption through HW/SW co-design. The essential idea is exerting the superiorities of energy efficiency for different encryption approaches and making full use of system resource through the Dynamic Management Mechanism including RequestAllocation algorithm and DynamicScheduler algorithm. Specifically, this scheme supports instruction set and hardware to process the computation compatibly by the Adaptive Control Crypto (ac_crypto) engine. Experimental results show that AEAS can improve energy efficiency by up to 933.5%, 68.8%, and 483.7% comparing with software, AES-NI and QAT, respectively.","PeriodicalId":215940,"journal":{"name":"Proceedings of the 2018 on Great Lakes Symposium on VLSI","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-05-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127440649","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Memristive Crossbar Mapping for Neuromorphic Computing Systems on 3D IC 三维集成电路上神经形态计算系统的记忆交叉杆映射
Proceedings of the 2018 on Great Lakes Symposium on VLSI Pub Date : 2018-05-30 DOI: 10.1145/3194554.3194636
Qi Xu, Song Chen, Bei Yu, Feng Wu
{"title":"Memristive Crossbar Mapping for Neuromorphic Computing Systems on 3D IC","authors":"Qi Xu, Song Chen, Bei Yu, Feng Wu","doi":"10.1145/3194554.3194636","DOIUrl":"https://doi.org/10.1145/3194554.3194636","url":null,"abstract":"In recent years, neuromorphic computing systems based on memristive crossbar have provided a promising solution to enable acceleration of neural networks. Meanwhile, most of the neural networks used in realistic applications are often sparse. If such sparse neural network is directly implemented on a single memristive crossbar, it would result in inefficient hardware realizations. In this work, we propose 3D-FNC, a 3D floorplanning framework for neuromorphic computing systems in consideration of both crossbar utilization and design cost. 3D-FNC groups neurons that connect more common neurons into one cluster, where the optimal number of clusters is determined by L-method. As a result, the connections of a neural network can be effectively mapped to memristive crossbars or discrete synapses. Finally, a 3D floorplanning for memristive crossbars and neurons is developed to reduce area and wirelength cost. Experimental results show that 3D-FNC can achieve highly hardware-efficient designs, compared to state-of-the-art.","PeriodicalId":215940,"journal":{"name":"Proceedings of the 2018 on Great Lakes Symposium on VLSI","volume":"84 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-05-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122285293","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
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