2012 10th IEEE International Conference on Semiconductor Electronics (ICSE)最新文献_第9页

Structural, morphological and photoluminescence studies of SnO2 microparticles SnO2微粒的结构、形态及光致发光研究

2012 10th IEEE International Conference on Semiconductor Electronics (ICSE) Pub Date : 2012-09-01 DOI: 10.1109/SMELEC.2012.6417247

K. Lim, M. A. Hamid, R. Shamsudin, A. Jalar, N. Al-Hardan

引用次数: 0

Characteristic analysis of 1024-point quantized Radix-2 FFT/IFFT processor 1024点量化Radix-2 FFT/IFFT处理器特性分析

2012 10th IEEE International Conference on Semiconductor Electronics (ICSE) Pub Date : 2012-09-01 DOI: 10.1109/SMElec.2012.6417231

R. Teymourzadeh, Memtode Jim, Mok Vee Hong

引用次数: 1

Compatibility issues of Si technology with higher band gap materials for RF applications 射频应用中硅技术与高带隙材料的兼容性问题

2012 10th IEEE International Conference on Semiconductor Electronics (ICSE) Pub Date : 2012-09-01 DOI: 10.1109/SMELEC.2012.6417173

B. Ghosh, I. Saad, K. A. Mohamad, N. Bolong, N. Parimon, A. Alias, M. Z. Hamzah

{"title":"Compatibility issues of Si technology with higher band gap materials for RF applications","authors":"B. Ghosh, I. Saad, K. A. Mohamad, N. Bolong, N. Parimon, A. Alias, M. Z. Hamzah","doi":"10.1109/SMELEC.2012.6417173","DOIUrl":"https://doi.org/10.1109/SMELEC.2012.6417173","url":null,"abstract":"Now-a-days microwave (MW) electronics is an extremely rapid developing field in semiconductor electronics. For the present and near future demand, research is progressing for the development of high speed and high power density RF devices fabrication beside main stream Si based research. For mixed and RF signal performance, Si still has limitations for it further scaling due to excess leakage of current and low trans-conductance or fT and f Max. So, suitable alternative materials device fabrication is potential. In this paper doping profile of GaAs channel and compositional (% of Al) variation in AlGaAs layer for schottky contact for AlGaAs/GaAs compound semiconductor (CS) based HEMT (high electron mobility transistor) is evaluated. Besides that, gate oxide thickness effects on covalent bonded Si based nMOS gate turn on time and ON/OFF current have also been evaluated. It appears that increasing Al composition in AlGaAs and more doping in GaAs layer enhances channel trans-conductance while low % of Al in AlGaAs layer and low doping in GaAs layer increases ON/OFF current ratio (reduces leakage current). In case of Si MOS, decreasing oxide layer thickness, transconductance is increased but ON/OFF current ratio is decreased (increase leakage current).","PeriodicalId":210558,"journal":{"name":"2012 10th IEEE International Conference on Semiconductor Electronics (ICSE)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130818843","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Design of a 9-bit UART module based on Verilog HDL 基于Verilog HDL的9位UART模块设计

2012 10th IEEE International Conference on Semiconductor Electronics (ICSE) Pub Date : 2012-09-01 DOI: 10.1109/SMELEC.2012.6417210

N. F. Mahat

引用次数: 31

The electrical conductivity of copper (I) iodide (CuI) thin films prepared by mister atomizer 雾化器制备的碘化铜(I)薄膜的电导率

2012 10th IEEE International Conference on Semiconductor Electronics (ICSE) Pub Date : 2012-09-01 DOI: 10.1109/SMELEC.2012.6417107

M. Amalina, A. R. Zainun, N. A. Rasheid, M. Rusop

引用次数: 1

Design study of integrated optical transducer for bioparticles detection 用于生物颗粒检测的集成光学传感器设计研究

2012 10th IEEE International Conference on Semiconductor Electronics (ICSE) Pub Date : 2012-09-01 DOI: 10.1109/SMELEC.2012.6417124

M. Masrie, B. Majlis, J. Yunas, P Susthitha Menon

引用次数: 1

Physical effects from etching parameters of the Bragg Grating Waveguide fabricated on porous silicon nanostructure 多孔硅纳米结构Bragg光栅波导刻蚀参数的物理效应

2012 10th IEEE International Conference on Semiconductor Electronics (ICSE) Pub Date : 2012-09-01 DOI: 10.1109/SMELEC.2012.6417171

A. Radzi, S. Yusop, N. Ikhsan, M. Rusop, S. Abdullah

引用次数: 0

Simultaneous study of thermal and optical characteristics of light-emitting diode 发光二极管热、光学特性的同步研究

2012 10th IEEE International Conference on Semiconductor Electronics (ICSE) Pub Date : 2012-09-01 DOI: 10.1109/SMELEC.2012.6417104

Z. Lee, M. Devarajan

{"title":"Simultaneous study of thermal and optical characteristics of light-emitting diode","authors":"Z. Lee, M. Devarajan","doi":"10.1109/SMELEC.2012.6417104","DOIUrl":"https://doi.org/10.1109/SMELEC.2012.6417104","url":null,"abstract":"This paper deals with the simultaneous study of thermal and optical behaviors of light-emitting diode (LED) through various measuring conditions. The conditions such as different types of thermal interface materials (TIMs) and increases of driving current have been selected for detailed investigation. The results revealed that the measuring conditions led to a greater impact on thermal properties than optical properties of the LED. The determined junction-to-ambient thermal resistance and junction temperature were enhanced about 1.35% and 0.78%, respectively by replacing alumina to silver thermal compound. This indicates that the application of silver thermal compound provided a slightly weaker heat transfer from the packaged LED to ambient. On the other hand, it was only 0.5% deviation on the overall optical performance was found between both the TIMs. Despite, it was observed that the increase of driving current caused an augment in optical power, and adversely decreased the efficiency of the LED. Finally, the study of real thermal resistance of the LED was performed as to improve the accuracy of the measurement.","PeriodicalId":210558,"journal":{"name":"2012 10th IEEE International Conference on Semiconductor Electronics (ICSE)","volume":"372 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115905313","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

Effects of annealing temperature on morphology and Crystallinity of nitrogen doped zinc oxide (ZnO:N) nano films 退火温度对氮掺杂氧化锌纳米膜形貌和结晶度的影响

2012 10th IEEE International Conference on Semiconductor Electronics (ICSE) Pub Date : 2012-09-01 DOI: 10.1109/SMELEC.2012.6417146

J. Karamdel, F. Razaghian, A. Hadi, C. Dee, B. Majlis

{"title":"Effects of annealing temperature on morphology and Crystallinity of nitrogen doped zinc oxide (ZnO:N) nano films","authors":"J. Karamdel, F. Razaghian, A. Hadi, C. Dee, B. Majlis","doi":"10.1109/SMELEC.2012.6417146","DOIUrl":"https://doi.org/10.1109/SMELEC.2012.6417146","url":null,"abstract":"Semiconductor of ZnO has been extensively researched in recent years for its extraordinary properties. ZnO is naturally an n-type semiconductor and due to asymmetric doping limitations, it is difficult to obtain p-type ZnO. In this work the deposited nitrogen doped zinc oxide nano films by reactive magnetron sputtering technique, were treated using conventional thermal annealing, while, the annealing temperature were varied from 300°C to 800°C in a mixture of nitrogen and oxygen ambient. The surface morphology, Crystallinity and electrical characteristics of prepared films have been investigated with respect to the temperature of annealing process. The XRD spectra of samples before and after annealing processes confirmed the deposition of wurtzite crystalline structures of ZnO. However, the annealed samples exhibited smaller FWHM compared to un-annealed ones, which confirms better crystalline structure of annealed films. Moreover, un-annealed specimens showed n-type conductivity with an electron concentration of 2.5×1016 cm-3, while the annealed samples exhibited p-type behavior with a hole concentration of 8.2×1015 cm-3.","PeriodicalId":210558,"journal":{"name":"2012 10th IEEE International Conference on Semiconductor Electronics (ICSE)","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115286700","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

A simulation study of the effect engineered tunnel barrier to the floating gate flash memory devices 工程隧道势垒对浮栅闪存器件影响的仿真研究

2012 10th IEEE International Conference on Semiconductor Electronics (ICSE) Pub Date : 2012-09-01 DOI: 10.1109/SMELEC.2012.6417128

M. Zakaria, U. Hashim, R. M. Ayub, Z. Zailan

{"title":"A simulation study of the effect engineered tunnel barrier to the floating gate flash memory devices","authors":"M. Zakaria, U. Hashim, R. M. Ayub, Z. Zailan","doi":"10.1109/SMELEC.2012.6417128","DOIUrl":"https://doi.org/10.1109/SMELEC.2012.6417128","url":null,"abstract":"Flash memory is a device that is used as a tool to store data electrically. The main advantage of this device is in the non-volatility which can store data without power supply, thus make the device very popular in broad application. Conventional Flash memory generally uses single tunnel oxide with a thickness of 7 nm to 10 nm as a tunnel barrier. In order to obtain good device performance, the thickness of the tunnel barrier must be reduced. If the thickness of the oxide is reduced below than 5 nm, device performance will be better but suffer from problems such as current leakage and data retention. To overcome this problem, a technique identified as Engineered Tunnel Barrier is used to replace the single oxide used in conventional flash memory. The programming characteristic of memories with different tunnel barrier stacks single layer oxide, symmetric layer and asymmetric layer dielectric are investigated using TCAD simulator. The T-suprem-4 was used for device process fabrication and MEDICI simulator used for electrical characteristics. From theoretical, confirmed that the memory with the multilayer tunnel barrier exhibits better programming characteristics in term of, programming tunneling current, programming speed and programming voltage.","PeriodicalId":210558,"journal":{"name":"2012 10th IEEE International Conference on Semiconductor Electronics (ICSE)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125051222","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2