{"title":"Superconducting-gate silicon field effect transistors","authors":"G. Yang, J. Qiao, F.E. Pagaduan","doi":"10.1109/HKEDM.1994.395135","DOIUrl":"https://doi.org/10.1109/HKEDM.1994.395135","url":null,"abstract":"A silicon field-effect transistor consisting of a superconducting yttrium barium copper oxide gate, an yttria-stabilized zirconia insulator layer, and p-type silicon substrate with phosphorous-implanted source/drain has been fabricated. The drain current-voltage characteristics at room temperature resemble results measured from a metal-oxide silicon field effect transistor. The key to this similarity lies in the existence of the interfacial silicon oxide layer between the gate insulator/buffer and silicon.<<ETX>>","PeriodicalId":206109,"journal":{"name":"1994 IEEE Hong Kong Electron Devices Meeting","volume":"144 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-07-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132082973","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A process scheme chosen for BiCMOS circuit","authors":"J. Bian, W. Lu","doi":"10.1109/HKEDM.1994.395141","DOIUrl":"https://doi.org/10.1109/HKEDM.1994.395141","url":null,"abstract":"Based on bipolar and metal-gate CMOS processes, and utilizing a process simulation method to calculate the key process parameter, an optimum BiCMOS process is obtained for HKE5833 serial-input latched drivers.<<ETX>>","PeriodicalId":206109,"journal":{"name":"1994 IEEE Hong Kong Electron Devices Meeting","volume":"366 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-07-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115195412","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Design and fabrication of micro-hotplate for thin film gas sensor","authors":"S. Fung, P. Chan, J. Sin, P. Cheung","doi":"10.1109/HKEDM.1994.395133","DOIUrl":"https://doi.org/10.1109/HKEDM.1994.395133","url":null,"abstract":"This paper reports a novel approach to fabricate a micro-hotplate for a thin film gas sensor. The approach uses frontside anisotropic etching of silicon together with special layout to create the thermally isolated structure. A sandwich of inter-dielectric layers and aluminum interconnection provides the supporting material while highly doped boron diffusion provides the heating and temperature sensing elements. The design incorporates a guard heater layout that improves the temperature uniformity. Simulation results show that the temperature variation on a sensor film of 50/spl times/60 /spl mu/m/sup 2/ is less than 25/spl deg/C when the operating temperature is 350/spl deg/C. The micro-hotplate exhibits heating efficiency of about 7/spl deg/C/mW and is compatible with standard technology.<<ETX>>","PeriodicalId":206109,"journal":{"name":"1994 IEEE Hong Kong Electron Devices Meeting","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-07-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123369316","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Heat transfer in a microchannel flow [substrate cooling]","authors":"W. Chu, U.T. Hsu, M. Wong, Y. Zohar","doi":"10.1109/HKEDM.1994.395134","DOIUrl":"https://doi.org/10.1109/HKEDM.1994.395134","url":null,"abstract":"The field of MicroElectroMechanical Systems (MEMS) is expanding rapidly. It is becoming feasible to integrate complete microsystems by merging mechanical, electrical, thermal, optical and perhaps chemical components. Utilizing surface micromachining techniques, a large number of small-size, high-precision channels can be constructed as part of microcooling systems. The experimental setup proposed for the study of heat transfer characteristics of such microchannel flow is described in the first part of the paper. In the second part, initial results of a theoretical investigation of heat removal from a substrate by microchannel flow are presented.<<ETX>>","PeriodicalId":206109,"journal":{"name":"1994 IEEE Hong Kong Electron Devices Meeting","volume":"38 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-07-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131338647","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Electrical performance and reliability of n-MOSFET's with gate dielectrics fabricated by different techniques","authors":"Zeng Xu, P. Lai, W. Ng","doi":"10.1109/HKEDM.1994.395138","DOIUrl":"https://doi.org/10.1109/HKEDM.1994.395138","url":null,"abstract":"In this paper, electrical characteristics and reliability of n-MOSFETs under DC/AC stress are investigated and results are compared among the devices with gate dielectrics fabricated by different techniques. From the results it is concluded that N/sub 2/O nitridation is a more promising technique to incorporate nitrogen into gate oxide than NH/sub 3/ nitridation both from the point of view of electrical performance and stability under CHCS and dynamic stress.<<ETX>>","PeriodicalId":206109,"journal":{"name":"1994 IEEE Hong Kong Electron Devices Meeting","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-07-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122602445","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"An equivalent circuit approach to semiconductor device simulation","authors":"T.K.P. Wong, P.C.H. Chan","doi":"10.1109/HKEDM.1994.395139","DOIUrl":"https://doi.org/10.1109/HKEDM.1994.395139","url":null,"abstract":"The development of a simulation program based on the equivalent circuit model approach and using symbolic manipulation tools was presented. We have shown that the result from simulation program can be verified with simple analytical expressions. We have also shown that this approach is general in a sense that any arbitrary impurity and recombination center profiles can be used. In this approach, the device is converted to an equivalent circuit. We expect this approach to be useful for mixed circuit and device simulation. Although we have only present the result for DC analysis, the result can easily be extended to transient and small-signal analysis.<<ETX>>","PeriodicalId":206109,"journal":{"name":"1994 IEEE Hong Kong Electron Devices Meeting","volume":"31 4","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-07-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131653283","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"On buried-oxide effects in SOI lateral bipolar transistors","authors":"S. Banna, P.C.H. Cuong, T. Nguyen, P. Ko","doi":"10.1109/HKEDM.1994.395137","DOIUrl":"https://doi.org/10.1109/HKEDM.1994.395137","url":null,"abstract":"In this paper an investigation on buried oxide effects in SOI lateral n-p-n bipolar transistors is presented. An anomalous buried oxide induced punchthrough effect is observed even for uniformly doped base and zero back-gate bias in SOI bipolar transistor. A better explanation for this effect is presented. This punchthrough is attributed to increased depletion widths compared to the bulk at collector and emitter junctions due to the presence of buried oxide in SOI substrates. The widely accepted depletion approximation fails to predict the depletion widths in SOI p-n junctions. Finally, a quasi-two-dimensional model is presented to model the potential distribution in the depletion region of SOI p-n junctions. Model predictions are found to be in good agreement with simulation data. Also the model is applied to design a lateral n-p-n transistor.<<ETX>>","PeriodicalId":206109,"journal":{"name":"1994 IEEE Hong Kong Electron Devices Meeting","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-07-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126871680","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Mode-field-half-widths of two kinds of planar single-mode waveguides","authors":"A. Liang","doi":"10.1109/HKEDM.1994.395132","DOIUrl":"https://doi.org/10.1109/HKEDM.1994.395132","url":null,"abstract":"In this paper, we derive the analytic formulae of the Laplacian mode-field-half-width (MFHW) and the near-field second moment MFHW for nonsymmetric step-index planar single mode optical waveguides and symmetric planar single mode optical waveguides with the Epstein-index.<<ETX>>","PeriodicalId":206109,"journal":{"name":"1994 IEEE Hong Kong Electron Devices Meeting","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-07-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131237905","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Factors affecting the forming characteristics of powder DCEL device","authors":"L. Tsang","doi":"10.1109/HKEDM.1994.395129","DOIUrl":"https://doi.org/10.1109/HKEDM.1994.395129","url":null,"abstract":"Copper coating is a process that converts an insulative ZnS phosphor powder conductive. Forming is a crucial fabrication step in DCEL technology. Further, forming is known to be the cause of aging in DCEL devices. It is well known that the temperature measured on a substrate surface of DCEL pixel during forming is 105/spl deg/C, and the purpose of forming is to create a highly resistive thin region of which the function is not completely clear. This paper reports how the conductivity of copper-coated DCEL phosphor powder changes with its temperature, how the temperature of the coating solution and gaseous environment affect the conductivity-temperature relationship, how the temperature measured on the substrate surface of a DCEL pixel during forming relates to the critical temperature of its copper coated phosphor. The function of the formed region and the method to eliminate the forming are also discussed.<<ETX>>","PeriodicalId":206109,"journal":{"name":"1994 IEEE Hong Kong Electron Devices Meeting","volume":"12 6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-07-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124839579","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Han Dejun, K.T. Chan, Li Guohui, Wang Wen-xun, E. Zhu
{"title":"A semi-insulating/n/sup +/-structure in GaAs substrates by high energy implantation","authors":"Han Dejun, K.T. Chan, Li Guohui, Wang Wen-xun, E. Zhu","doi":"10.1109/HKEDM.1994.395130","DOIUrl":"https://doi.org/10.1109/HKEDM.1994.395130","url":null,"abstract":"A structure that consists of a semi-insulating layer over a buried n/sup +/ layer (SI/n/sup +/) has been obtained by MeV Si/sup +/ implantation into SI-GaAs substrates and subsequently tailored by a very low dose O/sup +/ implantation. This novel structure has been studied by measurements of current-voltage characteristics, electrochemical C-V profiling and Hall effects. The results indicate that this structure is suitable for the provision of isolation, the fabrication of active devices and internal interconnections.<<ETX>>","PeriodicalId":206109,"journal":{"name":"1994 IEEE Hong Kong Electron Devices Meeting","volume":"283 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-07-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132186557","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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