Fifth Asia Symposium on Quality Electronic Design (ASQED 2013)最新文献_第3页

A low power oscillator based temperature sensor for RFID applications 一种基于低功耗振荡器的温度传感器，用于RFID应用

Fifth Asia Symposium on Quality Electronic Design (ASQED 2013) Pub Date : 2013-10-24 DOI: 10.1109/ASQED.2013.6643563

Saqib Mohamad, Fang Tang, A. Amira, A. Bermak, M. Benammar

引用次数: 10

Detecting resistive-opens in RRAM using Programmable DfT scheme 用可编程DfT方法检测RRAM中的电阻开度

Fifth Asia Symposium on Quality Electronic Design (ASQED 2013) Pub Date : 2013-10-24 DOI: 10.1109/ASQED.2013.6643558

N. Haron, N. Arshad, S. H. Herman

引用次数: 0

Applications of crystalline Indium-Gallium-Zinc-Oxide technology to LSI: Memory, processor, image sensor, and field programmable gate array 晶体铟镓锌氧化物技术在大规模集成电路中的应用:存储器、处理器、图像传感器和现场可编程门阵列

Fifth Asia Symposium on Quality Electronic Design (ASQED 2013) Pub Date : 2013-10-24 DOI: 10.1109/ASQED.2013.6643566

Y. Kurokawa, Y. Okamoto, T. Nakagawa, T. Aoki, Masataka Ikeda, M. Kozuma, Takeshi Osada, T. Ikeda, Naoto Yamade, Y. Okazaki, H. Miyairi, M. Fujita, J. Koyama, S. Yamazaki

引用次数: 10

Port assignment for multiplexer and interconnection optimization 多路复用器的端口分配和互连优化

Fifth Asia Symposium on Quality Electronic Design (ASQED 2013) Pub Date : 2013-10-24 DOI: 10.1109/ASQED.2013.6643576

Cong Hao, Haoran Zhang, Song Chen, T. Yoshimura, Minyou Wu

{"title":"Port assignment for multiplexer and interconnection optimization","authors":"Cong Hao, Haoran Zhang, Song Chen, T. Yoshimura, Minyou Wu","doi":"10.1109/ASQED.2013.6643576","DOIUrl":"https://doi.org/10.1109/ASQED.2013.6643576","url":null,"abstract":"Data path connection elements usually consume a significant amount of both power and area on a VLSI chip. In this paper, we focus on the port assignment problem for multiplexer (MUX) and interconnection optimization in High-Level Synthesis. Given a binding solution of operations and variables, the port assignment problem connects the registers to the operator ports through MUXes, to minimize the interconnections between MUXes and operator ports, as well as the MUX power and area. We formulate the port assignment problem for binary commutative operators as a vertex partition problem on a graph, and propose a local search based heuristic algorithm that iteratively performs the elementary spanning tree transformation on the graph to solve it. We also propose a method to estimate the result of the tree transformation and filter a considerable amount of bad solutions in advance which greatly accelerate the algorithm. The experimental results show that our proposed algorithm is able to achieve 48% execution time reduction and 8.3% power reduction compared with the previous work, and the power reduction can be obtained for 37% test benches.","PeriodicalId":198881,"journal":{"name":"Fifth Asia Symposium on Quality Electronic Design (ASQED 2013)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128955611","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Highly robust and sensitive charge transfer sense amplifier for ultra-low voltage DRAMs 用于超低电压dram的高鲁棒性和灵敏度电荷转移感测放大器

Fifth Asia Symposium on Quality Electronic Design (ASQED 2013) Pub Date : 2013-10-24 DOI: 10.1109/ASQED.2013.6643592

C. Lee, H. Yoon

{"title":"Highly robust and sensitive charge transfer sense amplifier for ultra-low voltage DRAMs","authors":"C. Lee, H. Yoon","doi":"10.1109/ASQED.2013.6643592","DOIUrl":"https://doi.org/10.1109/ASQED.2013.6643592","url":null,"abstract":"A new charge transfer sense amplifier for low voltage DRAMs is proposed. The proposed charge transfer sense amplifier has two features. One is the double boosting sensing node structure, and the other is the dynamic presensing latch. The double boosting sensing node structure consists of two boosting capacitors. The 1st and 2nd boosting capacitors are placed at the boosting nodes and sensing nodes, respectively. The sensing node and boosting node are connected by a PMOS diode-connected transistor. This structure is efficient in achieving high sensitivity in ultra-low supply voltage conditions. The dynamic presensing latch is placed at the sensing nodes between the bit-line pair. The sensing node voltage difference (ΔVSA) develops by the operation of the dynamic presensing latch. Pull-down/up latch works effectively because ΔVSA is larger than bit-line voltage difference. With a 0.5V power supply voltage using a NCSU 45nm process, the proposed charge transfer sense amplifier brings a significant increase of about 3.89 times in ΔVSA and a decrease of 22.3% in the sensing delay time compared with the characteristics obtained by the best-known prior scheme.","PeriodicalId":198881,"journal":{"name":"Fifth Asia Symposium on Quality Electronic Design (ASQED 2013)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128790302","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 6

Breakthrough of micro USB placement in printed circuit board 突破微型USB在印刷电路板上的放置

Fifth Asia Symposium on Quality Electronic Design (ASQED 2013) Pub Date : 2013-10-24 DOI: 10.1109/ASQED.2013.6643583

Kent Lee, Yow Huoy Thyng, Oliver Hooi

{"title":"Breakthrough of micro USB placement in printed circuit board","authors":"Kent Lee, Yow Huoy Thyng, Oliver Hooi","doi":"10.1109/ASQED.2013.6643583","DOIUrl":"https://doi.org/10.1109/ASQED.2013.6643583","url":null,"abstract":"Design reuse is a common approach employed to improve design productivity and efficiency, thus resulting shorter product time-to-market. For the goal of engineering excellence, development team is always looking for opportunity to reuse some of the electrical and mechanical concept, ideas and design. Chassis, as a major component of a radio, is identified as a good candidate for design reuse due to its longer lead-time to design, evaluate and qualification. This presents a challenge for the design team as component skyline is limited on both sides of PCB. For PCB component placement, it is commonly divided to primary and secondary side. Primary side is defined as the location of light components, whereas secondary side is for through holes and heavy components. Micro USB connector is categorized as heavy component with lead. It should be placed at secondary side of printed circuit board (PCB). However, in this project, the chassis was reused and limiting the component skyline on the secondary side of PCB. The existing chassis design does not allow micro USB connector to be placed at the secondary side of PCB due to mechanical Z-height interference. This paper attempts to discuss and elaborate in detail the approach and breakthrough idea of placing a heavy component (micro USB) at primary side of PCB, yet meeting PCB assembly and product reliability requirements.","PeriodicalId":198881,"journal":{"name":"Fifth Asia Symposium on Quality Electronic Design (ASQED 2013)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116191188","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Digitally controlled variation tolerant timing generation technique for SRAM sense amplifiers SRAM感测放大器的数字控制容差时序生成技术

Fifth Asia Symposium on Quality Electronic Design (ASQED 2013) Pub Date : 2013-10-24 DOI: 10.1109/ASQED.2013.6643593

K. R. Viveka, B. Amrutur

引用次数: 4

A wideband multi-stage inverter-based driver amplifier for IEEE 802.22 WRAN transmitters 一种用于IEEE 802.22 WRAN发射机的宽带多级逆变器驱动放大器

Fifth Asia Symposium on Quality Electronic Design (ASQED 2013) Pub Date : 2013-10-24 DOI: 10.1109/ASQED.2013.6643554

Gengzhen Qi, Ka-Fai Un, Wei-Han Yu, Pui-in Mak, R. Martins

引用次数: 3

A 1.8 V 64.9 uW 54.1 dB SNDR 1st order sigma-delta modulator design using clocked comparator Based Switched Capacitor technique 基于开关电容技术的1.8 V 64.9 uW 54.1 dB SNDR一阶sigma-delta调制器设计

Fifth Asia Symposium on Quality Electronic Design (ASQED 2013) Pub Date : 2013-10-24 DOI: 10.1109/ASQED.2013.6643591

S. Chakraborty, Manodipan Sahoo, H. Rahaman

{"title":"A 1.8 V 64.9 uW 54.1 dB SNDR 1st order sigma-delta modulator design using clocked comparator Based Switched Capacitor technique","authors":"S. Chakraborty, Manodipan Sahoo, H. Rahaman","doi":"10.1109/ASQED.2013.6643591","DOIUrl":"https://doi.org/10.1109/ASQED.2013.6643591","url":null,"abstract":"Continued scaling of feature sizes have led to reduction in OpAmp gain thus making it unsuitable for using in a negative feedback system. Comparator Based Switched Capacitor (CBSC) circuits have been proposed as an alternative solution to alleviate this problem. The architecture uses continuous comparators and current sources to detect the virtual ground condition at the input rather than forcing it in the case of an OpAmp. However the architecture consumes static power due to usage of continuous comparators thus making it unsuitable for ultra low power applications. In this work, we use a clocked comparator based switched capacitor circuit technique which mitigates the power concerns by using clocked comparators instead of continuous comparators. The charge transfer phase consists of several cycles and charging-discharging operation is performed by a number of binary weighted current sources. This work reports the application of this technique in a 1st order ΣΔ ADC in a 0.18 μm gpdk technology and we achieve 54.1 dB peak SNDR over a 20 KHz bandwidth dissipating 64.9 μW of power from a 1.8 V supply.","PeriodicalId":198881,"journal":{"name":"Fifth Asia Symposium on Quality Electronic Design (ASQED 2013)","volume":"39 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124415484","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Ultra low-supply voltage reference generator with low sensitivity to PVT variations 超低电源电压参考发生器，对PVT变化的灵敏度低

Fifth Asia Symposium on Quality Electronic Design (ASQED 2013) Pub Date : 2013-10-24 DOI: 10.1109/ASQED.2013.6643557

Hande Vinayak Gopal, P. Gupta, M. Baghini

引用次数: 0