2009 IEEE AUTOTESTCON最新文献

{"title":"Interface test adapter development & maintenance using a Continuity/Insulation Automatic Test Station in large scale test systems","authors":"Randall Lemon, Bruce Coulter, Steve Archibald, Chau Nguyen","doi":"10.1109/AUTEST.2009.5314017","DOIUrl":"https://doi.org/10.1109/AUTEST.2009.5314017","url":null,"abstract":"This abstract focuses on four key points with using the Continuity/Insulation Automatic Test Station (Cont/Insul ATE) set in a large scale system: (1) Setup of Cont/Insul ATE and software development for the Cont/Insul ATE; (2) Using the Cont/Insul ATE in prototype development; (3) Verification that multiple copies of Interface Test Adapters (ITAs) will be identical and wired correctly; and (4) Maintenance and repair of ITAs after delivery. A large scale system is defined as a system with multiple test stations at multiple locations and with multiple identical ITAs. This paper will review the advantages and disadvantages of a Cont/Insul ATE test station using cost and schedule impact during the various phases of designing new ITAs and maintaining the ITAs once they have been fielded. The Ground Minuteman Automatic Test System (GMATS) re-host project, completed by the 309th Software Maintenance Group (SMXG) at the Ogden Air Logistics Center (OO-ALC), will be used in this document as a test case. The GMATS project fielded 18 test stations at 8 separate locations, 332 total ITAs with 39 unique configurations. The ITA development work involved building 39 prototype ITAs, verifying the prototype ITAs against their master wire lists, running it through a series of self-tests, integrating the prototype ITAs with the Test Program Set (TPS), building production ITAs and then verifying each production ITA was built correctly. A successful program, such as GMATS, demonstrates that having an asset such as a Cont/Insul ATE test station can dramatically improve on-time deliverables and lower costs to the end customers.","PeriodicalId":187421,"journal":{"name":"2009 IEEE AUTOTESTCON","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-11-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115574007","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Digital Signals in IEEE 1641 and ATML","authors":"C. Gorringe, Malcolm Brown, T. Lopes","doi":"10.1109/AUTEST.2009.5314018","DOIUrl":"https://doi.org/10.1109/AUTEST.2009.5314018","url":null,"abstract":"The paper discusses the rational and benefits behind the recent MoD demonstration, using a fully compliant IEEE 1641 test system for both digital and analogue test programs, in line with the MoD ATS procurement policy.","PeriodicalId":187421,"journal":{"name":"2009 IEEE AUTOTESTCON","volume":"39 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-11-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114863453","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"A wavelet packets and PCA based method for testing of analog circuits","authors":"Chao-jie Zhang, S. Liang, Guo He, Xiaowei Yan","doi":"10.1109/AUTEST.2009.5314027","DOIUrl":"https://doi.org/10.1109/AUTEST.2009.5314027","url":null,"abstract":"A method based on wavelet packets and PCA is developed for testing of analog circuits. It can detect both hard and soft faults in an analog electronic circuit by analyzing its output voltage response. The wavelet packets decomposition tree of the output voltage response is computed and the energy of every decomposed signal is used to form the feature vector. These features are combined by PCA to detect faults of the circuits-under-test (CUT). The principal component model of fault-free circuits is constructed before the actual testing process. Then we can use this principal component model to test the CUT. The features of the CUT are compared with the principal component model to calculate the statistic for fault detection. The proposed method can overcome the difficulty in selecting features and determining thresholds according to the expert's empirical knowledge. It was used to test the Sallen-Key filter and compared with existing methods. The results show the effectiveness of the proposed method.","PeriodicalId":187421,"journal":{"name":"2009 IEEE AUTOTESTCON","volume":"62 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-11-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114707556","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Simplified metrics for evaluating designs for testability","authors":"L. Ungar, S. Davidson","doi":"10.1109/AUTEST.2009.5313996","DOIUrl":"https://doi.org/10.1109/AUTEST.2009.5313996","url":null,"abstract":"Design for Testability (DFT) evaluation is quite complex and circuit dependent. To simplify the analysis and to apply the methodology more generally to different circuit types and different levels of assembly, we focus our efforts on identifying areas of poor testability. We introduce metrics we call Sensitized Path Oriented Testability Scoring ™ or SPOTS ™, performed at all points where failure modes are to be detected and diagnosed, to spot poor testability. Once the problem is identified early in the design stage, especially when it is correlated with a circuit node and a failure mode, the remedy needed to correct the problem through DFT can be quite practical. SPOTS measures four testability attributes - controllability, distinguishability, test resource costs, and test escapes due to lack of testability. The metrics simplify previous testability techniques, by utilizing sensitized paths to measure circuit controllability. The use of sensitized paths greatly reduces the analysis required, and while it may not offer validation of testability, it succeeds in highlighting areas that lack testability. Controllability metric (CM) provides a number corresponding to the number of steps required to sensitize a path. Distinguishability metric (DM) measures the difficulty of isolating one fault from others. Test resource cost (RC), includes test program set (TPS) development costs and test equipment requirements, and is expressed in monetary currency. Penalty cost (PC) measures in currency the cost incurred for nodes left untested by escaping detection in tests. Associating each of these metrics to failure modes at each node creates a table that reveals where testability problems exist. Designers and testability analysts can work together to resolve them either by altering the fault detection and isolation requirements, improving test resources and/or redesigning the unit under test (UUT). This form of analysis is simpler to use and is applicable to any level of assembly — IC, board or system. It can even be utilized by those procuring commercial off the shelf (COTS) products to compare support costs for competing products.","PeriodicalId":187421,"journal":{"name":"2009 IEEE AUTOTESTCON","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-11-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130018655","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Physical signals, events and digital streams","authors":"A. Hulme","doi":"10.1109/AUTEST.2009.5314010","DOIUrl":"https://doi.org/10.1109/AUTEST.2009.5314010","url":null,"abstract":"A revision of IEEE Std 1641 is coming to an end and is undergoing its approval cycle. This standard, which provides a method of accurately defining signals and tests, has been further developed with many improvements. The use of signals and events has now been extended to include digital signals. These three elements, physical signal streams, event streams and digital streams, provide the vital backbone to the description of all signals, simple or complex. They define when a signal may exist and when it may not, when a signal has a value and when it has not, when it starts and when it stops. Understanding the operation of SignalFunctions of different types and the operation of the signal, event and digital streams is essential to the building of Test Signal Framework (TSF) models, especially those which include complex timing relationships. This paper explains each of these streams and how they interact one with another.","PeriodicalId":187421,"journal":{"name":"2009 IEEE AUTOTESTCON","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-11-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127945759","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Managing the transition to IEEE 1641, via ATLAS based test systems","authors":"A. Hulme","doi":"10.1109/AUTEST.2009.5314015","DOIUrl":"https://doi.org/10.1109/AUTEST.2009.5314015","url":null,"abstract":"Over the last two years, a product has been introduced onto a Royal Air Force test system, which provides an integrated IEEE 1641 development and run-time system. The program involved the integration of several existing COTS products to provide a facility to enable the creation of a TPS using 1641 signal definitions, through to the running of the test program using established instruments and driver software. This system uses ATLAS as an intermediary between the IEEE 1641 program and the run-time system. There are many existing systems in the field which are based on ATLAS of various flavors. Many, if not all, of these could be upgraded to include an IEEE 1641 programming facility, which would provide compatibility with the IEEE 1761 (ATML) series of standards now being adopted by the DoD. This paper discusses how the transition to IEEE 1641 may be managed at comparatively low cost using ATLAS systems. The result of this transitional method will be a suite of validated IEEE 1641 test programs that not only run on current and legacy test systems but will provide a library of programs ready to run on future full-function 1641-based test systems.","PeriodicalId":187421,"journal":{"name":"2009 IEEE AUTOTESTCON","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-11-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131507680","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"The most flexible system component","authors":"M. Lombardi","doi":"10.1109/AUTEST.2009.5314034","DOIUrl":"https://doi.org/10.1109/AUTEST.2009.5314034","url":null,"abstract":"Oscilloscopes are often found in ATE systems as debug tools. But the high speed capture capabilities can expand their application into a multitude of anticipated and unanticipated testing needs. This paper intends to extend the reader's understanding of the inherent measurement possibilities afforded by this important system component.","PeriodicalId":187421,"journal":{"name":"2009 IEEE AUTOTESTCON","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-11-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116511313","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Re-host factors and a method to maintain the integrity of a test","authors":"L. Kirkland","doi":"10.1109/AUTEST.2009.5314098","DOIUrl":"https://doi.org/10.1109/AUTEST.2009.5314098","url":null,"abstract":"Re-hosting Test Program Sets (TPS) is a diverse science. Methods of re-host are determined by many multifaceted factors. Some of these factors are: circuit complexity, customer requirements, documentation, optimal circuit coverage, schematics and data availability, existence of and obtainable test specs, legacy TPS History (no-fault-found and could-not duplicate problems or a high quality reliable TPS), quality of unit under test (UUT) data, technology of the TPS (digital, analog, hybrid, etc.), legacy ATEs, Software (SW) development environment, SW tools and translators, interface test adapters (ITA), contractual requirements; mating connectors, test connectors and fixtures and usability and accessibility of existing legacy TPS code. This paper will cover various TPS re-hosting philosophies (see table 1). Also, the paper will discuss the details of using the soft front panel method to duplicate a non-simulated digital legacy TPS.","PeriodicalId":187421,"journal":{"name":"2009 IEEE AUTOTESTCON","volume":"73 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-11-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122031708","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Wide spectral span Spectrum Analysis with an analog step and dwell translation pre-processor to a high dynamic range FFT based spectrum analyzer","authors":"W. Lowdermilk, F. Harris","doi":"10.1109/AUTEST.2009.5314014","DOIUrl":"https://doi.org/10.1109/AUTEST.2009.5314014","url":null,"abstract":"This paper describes a new high speed Spectrum Analysis technique that tiles a spectral display using a rapid step and dwell spectral sweep. The step and dwell translation operates as a block down converter that translates successive frequency spans to an IF filter which is sampled, A-to-D converted, and processed by a high dynamic range FFT spectrum analyzer. The step and dwell sweep of the analog block down converter enables sequential spectral probes reminiscent of a swept frequency analyzer. The windowed FFT performed during the dwell synthesizes a parallel filter bank that partitions the spectral span into the same resolution bands as an FM spectral sweep through the same spectral span. By performing this second partition in parallel rather than sequentially we can reduce the time duration required to sweep the desired spectral span or we can implement post detection averaging by performing multiple FFTs during each dwell interval. The rapid spectral sweeps that can be realized by this technique make the analyzer well suited for analyzing transient and non periodic input signals.","PeriodicalId":187421,"journal":{"name":"2009 IEEE AUTOTESTCON","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-11-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122629188","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"IEEE Std 1641","authors":"C. Gorringe","doi":"10.1109/AUTEST.2009.5314021","DOIUrl":"https://doi.org/10.1109/AUTEST.2009.5314021","url":null,"abstract":"Over the past three years, the IEEE Std 1641 Signal & Test Definition standard has been evolving and maturing. This year its first revision is set to come out. This paper discusses the changes and improvements incorporated within the revised draft standard and identifies how this standard has been integrated into other test standards, such as ATML.","PeriodicalId":187421,"journal":{"name":"2009 IEEE AUTOTESTCON","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-11-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122263855","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}