Proceedings 2001 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems最新文献_第4页

Efficient parity prediction in FPGA FPGA中有效的奇偶预测

Proceedings 2001 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems Pub Date : 2001-10-24 DOI: 10.1109/DFTVS.2001.966767

S. Ko, T. Xia, Jien-Chung Lo

引用次数: 1

Exploiting FPGA-based techniques for fault injection campaigns on VLSI circuits 利用基于fpga的技术在VLSI电路上进行故障注入活动

Proceedings 2001 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems Pub Date : 2001-10-24 DOI: 10.1109/DFTVS.2001.966777

P. Civera, L. Macchiarulo, M. Rebaudengo, M. Reorda, M. Violante

引用次数: 60

Design of fault-secure encoders for a class of systematic error correcting codes 一类系统纠错码的故障安全编码器设计

Proceedings 2001 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems Pub Date : 2001-10-24 DOI: 10.1109/DFTVS.2001.966784

S. Piestrak, A. Dandache, F. Monteiro

引用次数: 1

Testing Xilinx XC4000 configurable logic blocks with carry logic-modules 测试带有携带逻辑模块的Xilinx XC4000可配置逻辑块

Proceedings 2001 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems Pub Date : 2001-10-24 DOI: 10.1109/DFTVS.2001.966774

Xiaoling Sun, Jian Xu, P. Trouborst

引用次数: 8

Yield-reliability modeling for fault tolerant integrated circuits 容错集成电路的屈服可靠性建模

Proceedings 2001 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems Pub Date : 2001-10-24 DOI: 10.1109/DFTVS.2001.966749

T. S. Barnett, A. Singh, V. Nelson

引用次数: 6

Analyzing BIST robustness 分析BIST的鲁棒性

Proceedings 2001 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems Pub Date : 2001-10-24 DOI: 10.1109/DFTVS.2001.966758

J. Sosnowski

引用次数: 1

Relation between reliability and yield of ICs based on discrete defect distribution model 基于离散缺陷分布模型的集成电路可靠性与良率关系

Proceedings 2001 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems Pub Date : 2001-10-24 DOI: 10.1109/DFTVS.2001.966751

Tianxu Zhao, Y. Hao, Peijun Ma, Ta-Te Chen

引用次数: 1

Fail-safe synchronization circuit for duplicated systems 用于重复系统的故障安全同步电路

Proceedings 2001 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems Pub Date : 2001-10-24 DOI: 10.1109/DFTVS.2001.966795

E. Kolonis, M. Nicolaidis

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引用次数: 2

Test pattern for supply current test of open defects by applying time-variable electric field 应用时变电场对开路缺陷进行供电电流检测的试验方法

Proceedings 2001 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems Pub Date : 2001-10-24 DOI: 10.1109/DFTVS.2001.966781

H. Yotsuyanagi, M. Hashizume, Taisuke Iwakiri, M. Ichimiya, T. Tamesada

引用次数: 2

Analog BIST generator for ADC testing 用于ADC测试的模拟BIST发生器

Proceedings 2001 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems Pub Date : 2001-10-24 DOI: 10.1109/DFTVS.2001.966787

S. Bernard, F. Azaïs, Y. Bertrand, M. Renovell

引用次数: 13