Testing Xilinx XC4000 configurable logic blocks with carry logic-modules

Abstract

This paper presents a novel built-in self-test (BIST) scheme for configurable logic blocks (CLBs) of Xilinx XC4000 field programmable gate arrays (FPGAs). The test of the dedicated carry logic module (CLM) within a CLB is included for the first time. A minimum of eight CLB test configurations is given. A centralized BIST architecture supports the single stuck-at fault test of the CLM and the whole CLB. The scheme is also capable of locating any faulty CLBs with the maximum diagnostic resolution, two adjacent CLBs.