发布求助
文献互助 智能选刊 最新文献

2021 18th International SoC Design Conference (ISOCC)最新文献

筛选
英文 中文
Object Detection Network Robust to Local Illumination Variations 对局部光照变化的鲁棒目标检测网络
2021 18th International SoC Design Conference (ISOCC) Pub Date : 2021-10-06 DOI: 10.1109/ISOCC53507.2021.9613974
Jinyeon Kim, Jonghee Park, Sang-Seol Lee, Sung-Joon Jang
{"title":"Object Detection Network Robust to Local Illumination Variations","authors":"Jinyeon Kim, Jonghee Park, Sang-Seol Lee, Sung-Joon Jang","doi":"10.1109/ISOCC53507.2021.9613974","DOIUrl":"https://doi.org/10.1109/ISOCC53507.2021.9613974","url":null,"abstract":"A fusion block to extract illuminance features for counteracting extreme illumination variations was proposed in this paper. The block can be simply combined at the top of all kind of networks. Moreover, the lightweight block is suitable for mobile applications or embedded systems with limited computing resources. In addition, it proved that the block makes the network robust to the extreme illumination environment through a variety of fusion block experiments.","PeriodicalId":185992,"journal":{"name":"2021 18th International SoC Design Conference (ISOCC)","volume":"348 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-10-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122996615","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Low Energy and Error Resilient SOT-MRAM based FPGA LUT Cell 基于低能量和误差弹性的SOT-MRAM FPGA LUT单元
2021 18th International SoC Design Conference (ISOCC) Pub Date : 2021-10-06 DOI: 10.1109/ISOCC53507.2021.9613950
Dongsu Kim, Jongsun Park
{"title":"Low Energy and Error Resilient SOT-MRAM based FPGA LUT Cell","authors":"Dongsu Kim, Jongsun Park","doi":"10.1109/ISOCC53507.2021.9613950","DOIUrl":"https://doi.org/10.1109/ISOCC53507.2021.9613950","url":null,"abstract":"As process technology scales down, large standby power has become one of the critical issues for SRAM-based Lookup-Table (LUT). Recently, spin-orbit torque magnetic random access memory (SOT-MRAM) has become a promising candidate to replace SRAM based LUT. Thanks to its non-volatile characteristic, SOT-MRAM is expected to reduce power consumption. But, high write energy and read reliability issue are still large concern. In this paper, we propose a novel SOT-MRAM-based LUT cell using two transistors and a shared inverter. By removing cascading MUX from both read and write paths, we can reduce the write energy and improve the read reliability. HSPICE circuit simulations using the 65nm process show over 50 % of write energy savings compared to the state-of-the-art SOT-MRAM-based LUT.","PeriodicalId":185992,"journal":{"name":"2021 18th International SoC Design Conference (ISOCC)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-10-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126821350","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Solving Traveling Salesman Problems Using Ising Models with Simulated Bifurcation 用模拟分岔的Ising模型求解旅行商问题
2021 18th International SoC Design Conference (ISOCC) Pub Date : 2021-10-06 DOI: 10.1109/ISOCC53507.2021.9613918
Tingting Zhang, Qichao Tao, Jie Han
{"title":"Solving Traveling Salesman Problems Using Ising Models with Simulated Bifurcation","authors":"Tingting Zhang, Qichao Tao, Jie Han","doi":"10.1109/ISOCC53507.2021.9613918","DOIUrl":"https://doi.org/10.1109/ISOCC53507.2021.9613918","url":null,"abstract":"Many combinatorial optimization problems can be solved by numerically simulating classical nonlinear Hamiltonian systems based on the Ising model. Solving the traveling salesman problem (TSP) using the Ising model requires a quadratically increasing number of spins with strict constraints. Unlike classical simulated annealing, simulated bifurcation (SB) can update the states of spins in parallel. This feature can potentially accelerate the convergence of Hamiltonian in the Ising model by taking advantage of modern multi-core processors. As an improved SB algorithm, the ballistic SB (bSB) algorithm is considered for solving the TSP in this paper. The TSP is converted to an Ising problem with external magnetic fields. bSB is then expanded by introducing a time-dependent factor. Experiments on benchmark datasets show that the bSB-based Ising solver offers superior performance in solution quality and convergence speed.","PeriodicalId":185992,"journal":{"name":"2021 18th International SoC Design Conference (ISOCC)","volume":"135 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-10-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116104608","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Components Analysis on Audio Signal Mixtures 音频信号混合成分分析
2021 18th International SoC Design Conference (ISOCC) Pub Date : 2021-10-06 DOI: 10.1109/ISOCC53507.2021.9613899
Chanhee Lee, S. Yoon, Seokhyeong Kang
{"title":"Components Analysis on Audio Signal Mixtures","authors":"Chanhee Lee, S. Yoon, Seokhyeong Kang","doi":"10.1109/ISOCC53507.2021.9613899","DOIUrl":"https://doi.org/10.1109/ISOCC53507.2021.9613899","url":null,"abstract":"This paper presents a novel multi-label noise classification algorithm that uses a convolutional neural network and applies a sliding window for classification. The existing noise classification method uses a convolutional neural network, in which the input audio must have a fixed time length. On the other hand, time-variant networks such as a time-delay neural network or a recurrent neural network can use any length of time, but have a limitation of classifying only a single label within a short time. Considering such shortcomings, we propose a windowing method that applies multi-label classification in overlapping time windows. For an audio stream with a duration that is longer than the audio stream inputs that the model trained with, the model applies a sliding window with multi-label classification to detect the corresponding classes in each time sequence. The model then identifies the final classes of the input by considering the confidence scores of each output label in each time sequence. The classification accuracy was 94.17% for single-label audio, 85.21% for two-class audio, and averaged 86.39% for audio of various durations.","PeriodicalId":185992,"journal":{"name":"2021 18th International SoC Design Conference (ISOCC)","volume":"70 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-10-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123806060","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Challenges and Opportunities of Energy-Efficient CIM SoC Design for Edge AI Devices 面向边缘AI设备的节能CIM SoC设计的挑战与机遇
2021 18th International SoC Design Conference (ISOCC) Pub Date : 2021-10-06 DOI: 10.1109/ISOCC53507.2021.9613846
Jinshan Yue, Wenyu Sun, Huazhong Yang, Yongpan Liu
{"title":"Challenges and Opportunities of Energy-Efficient CIM SoC Design for Edge AI Devices","authors":"Jinshan Yue, Wenyu Sun, Huazhong Yang, Yongpan Liu","doi":"10.1109/ISOCC53507.2021.9613846","DOIUrl":"https://doi.org/10.1109/ISOCC53507.2021.9613846","url":null,"abstract":"Computing-in-Memory (CIM) has become a promising solution for energy-efficient SoC design, especially for intelligent edge devices. Previous works have explored low-power CIM circuits implementation and architecture-level design. However, several challenges still exist, which make CIM inefficient for practical applications. To promote CIM more practical and more energy-efficient, this paper reveals the challenges and opportunities of SRAM-based CIM SoC design.","PeriodicalId":185992,"journal":{"name":"2021 18th International SoC Design Conference (ISOCC)","volume":"92 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-10-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131289271","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A 0.6-V 400-KS/s Low Noise Asynchronous SAR ADC With Dual-Domain Comparison 具有双域比较的0.6 v 400-KS/s低噪声异步SAR ADC
2021 18th International SoC Design Conference (ISOCC) Pub Date : 2021-10-06 DOI: 10.1109/ISOCC53507.2021.9613979
Sang-Hoon Lee, Won-Young Lee
{"title":"A 0.6-V 400-KS/s Low Noise Asynchronous SAR ADC With Dual-Domain Comparison","authors":"Sang-Hoon Lee, Won-Young Lee","doi":"10.1109/ISOCC53507.2021.9613979","DOIUrl":"https://doi.org/10.1109/ISOCC53507.2021.9613979","url":null,"abstract":"This paper presents a low noise 0.6-V 400-KS/s asynchronous successive approximation register (SAR) analog-to-digital converter (ADC) with time domain comparator. The VCDL-based time domain comparator suppresses noise at low voltages but requires significant conversion time. Therefore, the sampling rate of the low voltage SAR ADC is increased by using a double-tail comparator and asynchronous logic. An implemented 10-bit ADC in a 180-nm CMOS technology occupies 1130μm x 740μm. At a 0.6-V supply voltage and a 400-KS/s sampling rate, the proposed SAR ADC achieves a signal-to-noise and distortion ratio (SNDR) of 56.59 and an effective number of bits (ENOB) of 9.13 bits.","PeriodicalId":185992,"journal":{"name":"2021 18th International SoC Design Conference (ISOCC)","volume":"43 9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-10-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133706917","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Time-Domain Computing-In-Memory Micro using Ring Oscillator 基于环形振荡器的时域内存计算微处理器
2021 18th International SoC Design Conference (ISOCC) Pub Date : 2021-10-06 DOI: 10.1109/ISOCC53507.2021.9613954
Yixuan He, Minsu Choi, Kyung Ki Kim, Yong-Bin Kim
{"title":"A Time-Domain Computing-In-Memory Micro using Ring Oscillator","authors":"Yixuan He, Minsu Choi, Kyung Ki Kim, Yong-Bin Kim","doi":"10.1109/ISOCC53507.2021.9613954","DOIUrl":"https://doi.org/10.1109/ISOCC53507.2021.9613954","url":null,"abstract":"This paper proposes a novel time-domain computing-in-memory core that implements XNOR-and-accumulate (XAC) of XNOR network in 8T SRAM cell. This new technique uses an inverter-based ring oscillator to generate periodic waves whose period represents the accumulation result of the input XNOR values. The circuit is built and simulated using PTM16_HP 16nm CMOS model with a 0.7V power supply. The results show correct functionality, a large signal margin and 463 TOPS/W efficiency. With further exploration, the time-domain computation could be a new candidate for in-memory computing since it has its own superiorities in comparison to mixed-signal or digital methods.","PeriodicalId":185992,"journal":{"name":"2021 18th International SoC Design Conference (ISOCC)","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-10-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134625322","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Layer-wise Pruning of Transformer Attention Heads for Efficient Language Modeling 面向高效语言建模的变压器注意头分层修剪
2021 18th International SoC Design Conference (ISOCC) Pub Date : 2021-10-06 DOI: 10.1109/ISOCC53507.2021.9613933
Kyuhong Shim, Iksoo Choi, Wonyong Sung, Jungwook Choi
{"title":"Layer-wise Pruning of Transformer Attention Heads for Efficient Language Modeling","authors":"Kyuhong Shim, Iksoo Choi, Wonyong Sung, Jungwook Choi","doi":"10.1109/ISOCC53507.2021.9613933","DOIUrl":"https://doi.org/10.1109/ISOCC53507.2021.9613933","url":null,"abstract":"Recently, the necessity of multiple attention heads in transformer architecture has been questioned [1]. Removing less important heads from a large network is a promising strategy to reduce computation cost and parameters. However, pruning out attention heads in multihead attention does not evenly reduce the overall load, because feedforward modules are not affected. In this study, we apply attention head pruning on All-attention [2] transformer, where savings in the computation are proportional to the number of pruned heads. This improved computing efficiency comes at the cost of pruning sensitivity, which we stabilize with three training techniques. Our attention head pruning enables a considerably fewer number of parameters with a comparable perplexity for transformer-based language modeling.","PeriodicalId":185992,"journal":{"name":"2021 18th International SoC Design Conference (ISOCC)","volume":"134 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-10-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124512367","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
K-means Clustering-specific Lightweight RISC-V processor K-means集群专用的轻量级RISC-V处理器
2021 18th International SoC Design Conference (ISOCC) Pub Date : 2021-10-06 DOI: 10.1109/ISOCC53507.2021.9613863
Wooyoung Lee, Jin-Ah Park, Changjun Byun, Eunji Choi, Jae-Hyoung Lee, Woojoo Lee, Kyung Jin Byun, Kyuseung Han
{"title":"K-means Clustering-specific Lightweight RISC-V processor","authors":"Wooyoung Lee, Jin-Ah Park, Changjun Byun, Eunji Choi, Jae-Hyoung Lee, Woojoo Lee, Kyung Jin Byun, Kyuseung Han","doi":"10.1109/ISOCC53507.2021.9613863","DOIUrl":"https://doi.org/10.1109/ISOCC53507.2021.9613863","url":null,"abstract":"While the demand for edge devices performing K-means clustering algorithm is expected to explode, this paper introduces a K-means clustering-specific processor for edge devices. The processor consists of hardware to accelerate the K-means algorithm and lightweight RISC-V core, and functional validation has been completed through RTL simulation and FPGA prototyping. The processor prototype demonstrates its excellence by performing the K-means algorithm about 56 times faster.","PeriodicalId":185992,"journal":{"name":"2021 18th International SoC Design Conference (ISOCC)","volume":"71 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-10-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125192102","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A 30-Gb/s PAM-8 Transmitter with a 2-Tap Feed-Forward Equalizer and Background Clock Calibration 30gb /s PAM-8发射机，具有2分路前馈均衡器和背景时钟校准
2021 18th International SoC Design Conference (ISOCC) Pub Date : 2021-10-06 DOI: 10.1109/ISOCC53507.2021.9614002
Sanghyeon Park, Jaenam Kim, Seung-Ah Park, J. Chun
{"title":"A 30-Gb/s PAM-8 Transmitter with a 2-Tap Feed-Forward Equalizer and Background Clock Calibration","authors":"Sanghyeon Park, Jaenam Kim, Seung-Ah Park, J. Chun","doi":"10.1109/ISOCC53507.2021.9614002","DOIUrl":"https://doi.org/10.1109/ISOCC53507.2021.9614002","url":null,"abstract":"This paper proposes a pulse amplitude modulation-8 (PAM-8) transmitter with a 2-tap feed-forward equalizer and background clock calibration circuits. To generate PAM-8 signals, the transmitter consists of three slices with binary-weighted current-mode drivers. Each data slice includes a 4:1 multiplexer that uses the quarter-rate multi-phase clocks to reduce the power consumption. The duty cycle corrector and the quadrature error corrector circuits perform background clock phase calibration. The proposed transmitter, fabricated in a 28-nm FDSOI process, achieves 1.3-pJ/b power efficiency at 30Gb/s operation from the 1.0-V supply.","PeriodicalId":185992,"journal":{"name":"2021 18th International SoC Design Conference (ISOCC)","volume":"266 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-10-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133276446","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
首页 上一页 下一页 尾页
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整，为了账户安全，请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
请完成安全验证×
相关产品
×
本文献相关产品
联系我们：info@booksci.cn Book学术提供免费学术资源搜索服务，方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号：604180095
Book学术官方微信
小红书