A 30-Gb/s PAM-8 Transmitter with a 2-Tap Feed-Forward Equalizer and Background Clock Calibration

Abstract

This paper proposes a pulse amplitude modulation-8 (PAM-8) transmitter with a 2-tap feed-forward equalizer and background clock calibration circuits. To generate PAM-8 signals, the transmitter consists of three slices with binary-weighted current-mode drivers. Each data slice includes a 4:1 multiplexer that uses the quarter-rate multi-phase clocks to reduce the power consumption. The duty cycle corrector and the quadrature error corrector circuits perform background clock phase calibration. The proposed transmitter, fabricated in a 28-nm FDSOI process, achieves 1.3-pJ/b power efficiency at 30Gb/s operation from the 1.0-V supply.