2022 IEEE 11th Non-Volatile Memory Systems and Applications Symposium (NVMSA)最新文献

Minimizing Age-of-Information of NVRAM-based Intermittent Systems 基于nvram的间歇系统的信息年龄最小化

2022 IEEE 11th Non-Volatile Memory Systems and Applications Symposium (NVMSA) Pub Date : 2022-08-01 DOI: 10.1109/NVMSA56066.2022.00013

Hung-Yu Lin, Yu-Pei Liang, Shuo-Han Chen, Yuan-Hao Chang, Tseng-Yi Chen, W. Shih

{"title":"Minimizing Age-of-Information of NVRAM-based Intermittent Systems","authors":"Hung-Yu Lin, Yu-Pei Liang, Shuo-Han Chen, Yuan-Hao Chang, Tseng-Yi Chen, W. Shih","doi":"10.1109/NVMSA56066.2022.00013","DOIUrl":"https://doi.org/10.1109/NVMSA56066.2022.00013","url":null,"abstract":"Due to the near-zero idle power consumption characteristic of non-volatile random access memory (NVRAM), NVRAM has gained popularity as a great alternative to volatile RAM on energy-constraint and tiny embedded systems that run on intermittent power. In particular, multi-level-cell (MLC) NVRAM can further reduce the energy consumption of data writes by alternating data write modes with different retention periods. Nevertheless, due to the unstable power supply of intermittent systems, data on NVRAM could become obsolete and result in distortion of reality as time goes by. As intermittent systems typically involve a large number of sensors and numerous transmitters to collect environmental data, data freshness is vital for accurate scientific study. To ensure the data freshness, this paper proposes a minimizing average system age-of-information (AoI) scheme, abbreviated as MASA scheme, for MLC-NVRAM-based intermittent systems. The proposed policy harmonizes data write modes according to data update intervals of sensors with the goal of minimizing AoI and energy consumption. The experimental results indicate that the proposed policy achieves a better average AoI than the existing schemes.","PeriodicalId":185204,"journal":{"name":"2022 IEEE 11th Non-Volatile Memory Systems and Applications Symposium (NVMSA)","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114999016","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Efficient and Atomic-Durable Persistent Memory through In-PM Hybrid Logging 通过In-PM混合日志记录高效和原子持久的持久内存

2022 IEEE 11th Non-Volatile Memory Systems and Applications Symposium (NVMSA) Pub Date : 2022-08-01 DOI: 10.1109/NVMSA56066.2022.00010

Nai-Jia Dong, Hsiang-Yun Cheng, Chia-Lin Yang, Bo-Rong Lin, Hsiang-Pang Li

引用次数: 1

RNA-seq Quantification on Processing in memory Architecture: Observation and Characterization 记忆结构中rna序列定量处理:观察与表征

2022 IEEE 11th Non-Volatile Memory Systems and Applications Symposium (NVMSA) Pub Date : 2022-08-01 DOI: 10.1109/nvmsa56066.2022.00014

Liang-Chi Chen, Shu-Qi Yu, Chien-Chung Ho, Yuan-Hao Chang, Da-Wei Chang, Wei-Chen Wang, Yu-Ming Chang

{"title":"RNA-seq Quantification on Processing in memory Architecture: Observation and Characterization","authors":"Liang-Chi Chen, Shu-Qi Yu, Chien-Chung Ho, Yuan-Hao Chang, Da-Wei Chang, Wei-Chen Wang, Yu-Ming Chang","doi":"10.1109/nvmsa56066.2022.00014","DOIUrl":"https://doi.org/10.1109/nvmsa56066.2022.00014","url":null,"abstract":"In recent years, the processing in memory (PIM) technique has progressively captured people’s attention since it reveals the potential to strike down the von Neumann bottleneck by minimizing off-chip data movement between processor and memory. As the first publicly commercial PIM system, UPMEM DPU, was proposed in 2019, lots of encouraging results show that the UPMEM DPU architecture helps many data-intensive applications to get rid of the von-Neumann bottleneck. To better understand the constraints and capability of UPMEM DPU, the RNA sequences quantification application, kallisto [3], is chosen as the case study and used to show the design tradeoffs and design considerations that should be paid attention to. To achieve this objective, a DPU-based kallisto, named D_kallisto, is presented to resolve the design challenges caused by both the software/hardware constraints of DPUs and programming constraints over the DPU system. A series of experiments was built and conducted to evaluate the capability of our proposed D_kallisto with adopting different mechanisms and policies. Through the presented analysis and comparison, this work can help the community to understand the real concerns on designing and developing DPU programs.","PeriodicalId":185204,"journal":{"name":"2022 IEEE 11th Non-Volatile Memory Systems and Applications Symposium (NVMSA)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123985924","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

RUSM: Harnessing Unused Resources in 3D NAND SSD to Enhance Reading Performance 利用3D NAND SSD中未使用的资源来提高读取性能

2022 IEEE 11th Non-Volatile Memory Systems and Applications Symposium (NVMSA) Pub Date : 2022-08-01 DOI: 10.1109/NVMSA56066.2022.00020

Hasan Alhasan, Yun-Chih Chen, Chien-Chung Ho, Tei-Wei Kuo

引用次数: 0

Polling Based Per-core Workqueue Management in XFS Journaling XFS日志中基于轮询的每核工作队列管理

2022 IEEE 11th Non-Volatile Memory Systems and Applications Symposium (NVMSA) Pub Date : 2022-08-01 DOI: 10.1109/NVMSA56066.2022.00016

Kwangwon Min, Dohyun Kim, S. Lim, Y. Won

引用次数: 0

HNFFS: Revisiting the NOR Flash File System HNFFS:重新访问NOR Flash文件系统

2022 IEEE 11th Non-Volatile Memory Systems and Applications Symposium (NVMSA) Pub Date : 2022-08-01 DOI: 10.1109/NVMSA56066.2022.00012

Yanqi Pan, Zhisheng Hu, N. Zhang, Hao Hu, Wen Xia, Zhongming Jiang, Liang Shi, Shiyi Li

{"title":"HNFFS: Revisiting the NOR Flash File System","authors":"Yanqi Pan, Zhisheng Hu, N. Zhang, Hao Hu, Wen Xia, Zhongming Jiang, Liang Shi, Shiyi Li","doi":"10.1109/NVMSA56066.2022.00012","DOIUrl":"https://doi.org/10.1109/NVMSA56066.2022.00012","url":null,"abstract":"NOR flash, a type of non-volatile memory technologies, embraces its new age of IoT due to its execute-in-place (XIP) feature. Generally, there are two representative file systems designed for NOR flash: Journaling Flash File System 2 (JFFS2) and Spi Flash File System (SPIFFS). They suffer from either slow mount time, heavy foreground garbage collection (GC) overheads, poor read/write performance, or inefficient Wear- Leveling (WL), and thus they are unfriendly to IoT devices. To overcome the above limitations of existing NOR flash file systems, we propose and design a Harmony NOR Flash File System (HNFFS): (1) We introduce Erasable Sector Summary (ESS) to reduce mount time by leveraging NOR flash’s fast read capabilities. ESS deploys summary nodes to avoid scanning the whole NOR flash when mounting the system. (2) We propose Adaptive Garbage Collection (AGC), which allows the NOR flash file system to adaptively trigger GC in advance and thus reduces the heavy Foreground GC overheads. (3) We introduce Mergeable Tree (MT) to decrease the DRAM usage for indexing while improving write performance by merging the sequential small-data write. (4) We provide Random Static Wear-Leveling (RSWL) to efficiently perform WL by combining the high performance Random WL (RWL) and the reliable Static WL (SWL). Experimental results suggest that HNFFS outperforms the state-of-the-art NOR flash file systems. Moreover, the evaluation of RSWL also shows the optimal tradeoff between performance and wear evenness.","PeriodicalId":185204,"journal":{"name":"2022 IEEE 11th Non-Volatile Memory Systems and Applications Symposium (NVMSA)","volume":"101 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117274075","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

An Integrated Subpage-aware Write Method in Large-Page-based SSDs 基于大页面的ssd中集成的子页面感知写入方法

2022 IEEE 11th Non-Volatile Memory Systems and Applications Symposium (NVMSA) Pub Date : 2022-08-01 DOI: 10.1109/NVMSA56066.2022.00018

Chin-Hsien Wu, Chian-Shiang Ou Yang

引用次数: 0

Nimble Mapping SSD: Leaning State Mapping Strategy to Increase Reliability of 3D TLC Charge-Trap NAND Flash Memory 灵活的映射SSD:学习状态映射策略，以提高3D TLC电荷陷阱NAND闪存的可靠性

2022 IEEE 11th Non-Volatile Memory Systems and Applications Symposium (NVMSA) Pub Date : 2022-08-01 DOI: 10.1109/NVMSA56066.2022.00019

Chih-Chia Chen, Jen-Wei Hsieh

{"title":"Nimble Mapping SSD: Leaning State Mapping Strategy to Increase Reliability of 3D TLC Charge-Trap NAND Flash Memory","authors":"Chih-Chia Chen, Jen-Wei Hsieh","doi":"10.1109/NVMSA56066.2022.00019","DOIUrl":"https://doi.org/10.1109/NVMSA56066.2022.00019","url":null,"abstract":"With the adoption of vertical stacked structure and charge-trap cell design, 3D NAND flash memory reduces the cost-per-bit and becomes the mainstream in the storage market. Since every operation can cause the damage to NAND flash memory and increase the error bits, each cell in NAND flash memory can endure only limited write and erase operations. While the bit errors are highly related to the data pattern, conventional works such as data randomization distribute the threshold voltage states uniformly to prevent the worse-case data pattern. However, data randomization may miss the opportunity to improve the SSD’s lifetime because the distribution of threshold voltage states is uniform whatever the access behavior. In 3D charge trap NAND flash, as the lower states would incur more right shifting than a cell with higher states, the access behavior may influence the bit errors. In this paper, we propose a error mitigation scheme to improve reliability of NAND flash-memory storage devices by utilizing the characteristic of 3D charge trap NAND flash memory to encode the written data asymmetrically. Compared with the related work, our proposed Nimble Mapping SSD (NMS) could improve the reliability with less memory overhead. For the retention error, NMS has similar encoding effect, and the experiment results showed that the BER is averagely 1.2% lower than the related work. Furthermore, NMS could reduce the BER of program variation by 17.1% on average.","PeriodicalId":185204,"journal":{"name":"2022 IEEE 11th Non-Volatile Memory Systems and Applications Symposium (NVMSA)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133458811","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Latency Aware Page Migration for Read Performance Optimization on Hybrid SSDs 基于延迟感知的混合ssd读性能优化页面迁移

2022 IEEE 11th Non-Volatile Memory Systems and Applications Symposium (NVMSA) Pub Date : 2022-08-01 DOI: 10.1109/NVMSA56066.2022.00015

Shicheng Li, Longfei Luo, Yina Lv, Liang Shi

引用次数: 1

Buffered Hash Table: Leveraging DRAM to Enhance Hash Indexes in the Persistent Memory 缓冲哈希表:利用DRAM增强持久内存中的哈希索引

2022 IEEE 11th Non-Volatile Memory Systems and Applications Symposium (NVMSA) Pub Date : 2022-08-01 DOI: 10.1109/NVMSA56066.2022.00011

Chen Zhong, Prajwal Challa, Xingsheng Zhao, Song Jiang

引用次数: 0