记忆结构中rna序列定量处理:观察与表征

Liang-Chi Chen, Shu-Qi Yu, Chien-Chung Ho, Yuan-Hao Chang, Da-Wei Chang, Wei-Chen Wang, Yu-Ming Chang
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引用次数: 2

摘要

近年来,内存处理(PIM)技术逐渐引起人们的关注,因为它揭示了通过减少处理器和存储器之间的片外数据移动来打破冯·诺依曼瓶颈的潜力。作为第一个公开商业化的PIM系统,UPMEM DPU于2019年被提出,许多令人鼓舞的结果表明,UPMEM DPU架构帮助许多数据密集型应用摆脱了冯-诺伊曼瓶颈。为了更好地理解UPMEM DPU的限制和能力,我们选择RNA序列量化应用kallisto[3]作为案例研究,并使用它来展示设计权衡和应注意的设计注意事项。为了实现这一目标,提出了一种基于DPU的kallisto,命名为D_kallisto,以解决DPU的软件/硬件约束和DPU系统的编程约束所带来的设计挑战。我们建立了一系列的实验来评估我们提出的D_kallisto在不同机制和策略下的能力。通过本文的分析和比较,可以帮助业界了解设计和开发DPU程序的实际问题。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
RNA-seq Quantification on Processing in memory Architecture: Observation and Characterization
In recent years, the processing in memory (PIM) technique has progressively captured people’s attention since it reveals the potential to strike down the von Neumann bottleneck by minimizing off-chip data movement between processor and memory. As the first publicly commercial PIM system, UPMEM DPU, was proposed in 2019, lots of encouraging results show that the UPMEM DPU architecture helps many data-intensive applications to get rid of the von-Neumann bottleneck. To better understand the constraints and capability of UPMEM DPU, the RNA sequences quantification application, kallisto [3], is chosen as the case study and used to show the design tradeoffs and design considerations that should be paid attention to. To achieve this objective, a DPU-based kallisto, named D_kallisto, is presented to resolve the design challenges caused by both the software/hardware constraints of DPUs and programming constraints over the DPU system. A series of experiments was built and conducted to evaluate the capability of our proposed D_kallisto with adopting different mechanisms and policies. Through the presented analysis and comparison, this work can help the community to understand the real concerns on designing and developing DPU programs.
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