RNA-seq Quantification on Processing in memory Architecture: Observation and Characterization

Abstract

In recent years, the processing in memory (PIM) technique has progressively captured people’s attention since it reveals the potential to strike down the von Neumann bottleneck by minimizing off-chip data movement between processor and memory. As the first publicly commercial PIM system, UPMEM DPU, was proposed in 2019, lots of encouraging results show that the UPMEM DPU architecture helps many data-intensive applications to get rid of the von-Neumann bottleneck. To better understand the constraints and capability of UPMEM DPU, the RNA sequences quantification application, kallisto [3], is chosen as the case study and used to show the design tradeoffs and design considerations that should be paid attention to. To achieve this objective, a DPU-based kallisto, named D_kallisto, is presented to resolve the design challenges caused by both the software/hardware constraints of DPUs and programming constraints over the DPU system. A series of experiments was built and conducted to evaluate the capability of our proposed D_kallisto with adopting different mechanisms and policies. Through the presented analysis and comparison, this work can help the community to understand the real concerns on designing and developing DPU programs.