Haotong Qin, Donghua Yang, Tao Fan, Tao Chen, Chunhong Zhang, Yuqian Chen
{"title":"Growth Behavior of Interfacial Intermetallic Compounds of Co-20%P/Solder Joint under Temperature Gradient","authors":"Haotong Qin, Donghua Yang, Tao Fan, Tao Chen, Chunhong Zhang, Yuqian Chen","doi":"10.1109/ICEPT52650.2021.9568134","DOIUrl":"https://doi.org/10.1109/ICEPT52650.2021.9568134","url":null,"abstract":"In this paper, the growth behavior of interfacial IMC of Co-P/SAC105/Co-P solder joints under the temperature gradients of ${2215^{circ}mathrm{C}/text{cm}}$ and $mathbf{3260^{circ}mathbf{C}/mathbf{cm}}$ were studied. Co-P UBMs with 20% P content were electroplated on the copper substrates. Co-p/SAC105/Co-P solder joints were prepared by reflow welding process. BGA solder balls were Sn-1.0wt.%Ag-0.5%Cu solder balls with diameters of ${400mumathrm{m}}$. The obtained solder joints were used to two above temperature gradients test, and the loading times were Oh, 100h, 200h and 400h, respectively. It found that the Co-Sn-P layer appeared between the Co-P film and the CoSn3 layer. As the loading time of the temperature gradient increased, the fine needle-shaped $mathbf{CoSn_{3}}$ near the Sn solder became plate-shaped CoSn3, and finally formed a bulk shape. Compared with ${2215^{mathrm{o}}mathrm{C}/text{cm}}$, the interfacial CoSn3 was relatively continuous and dense, because of the better combination of fine needle-shaped $mathbf{CoSn_{3}}$ and bulk-shaped CoSn3 under ${3260^{mathrm{o}}mathrm{C}/text{cm}}$, With the loading time increased, the growth of CoSn3 at the hot and cold ends of the solder joints interface showed obvious differences. Intuitively, the thickness of the cold end increases more rapidly than that of the hot end. After loading time of 400h under ${2215^{circ}mathrm{C}/text{cm}}$, the total thickness growth of CoSn3 was 18.10μm. After loading time of 400h under ${3260^{mathrm{o}}mathrm{C}/text{cm}}$, the total thickness growth of CoSn3 was 46.74μm. It showed that the growth of CoSn3 at the cold and hot ends shows the more significant asymmetric growth trend under a larger temperature gradient, revealing that the growth of interfacial CoSn3 could be induced by the larger temperature gradient.","PeriodicalId":184693,"journal":{"name":"2021 22nd International Conference on Electronic Packaging Technology (ICEPT)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-09-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134150275","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Jinzhu Zhou, Zhenyu Gu, Yu Si, Mei Wang, Ping'an Wang
{"title":"Electromechanical Co-Design and Experimental Testing of Package Layer in Structurally Embedded Phased Array Antenna","authors":"Jinzhu Zhou, Zhenyu Gu, Yu Si, Mei Wang, Ping'an Wang","doi":"10.1109/ICEPT52650.2021.9567721","DOIUrl":"https://doi.org/10.1109/ICEPT52650.2021.9567721","url":null,"abstract":"Structurally embedded phased array antenna (SEPAA) provides a new paradigm where the structural surface of a mobile vehicle acts as an antenna. This letter presents an optimal design method for a new SEP AA which consists of a package layer, a RF layer and a power-signal process layer. Electromechanical co-design model of the package layer was formulated to obtain an optimal mechanical and electromagnetic performance of the SEP AA. Moreover, in order to efficiently solve the model, this paper also proposes a parallel Bayesian optimization (PBO), which can utilize the parallel computing of EM simulations to alleviate the computational cost. The comparison results show that the PBO achieves better optimization results with significantly less iteration numbers, and the measured results of the fabricated Ka-band prototype demonstrate that the designed SEP AA has good mechanical load-bearing and radiation performance.","PeriodicalId":184693,"journal":{"name":"2021 22nd International Conference on Electronic Packaging Technology (ICEPT)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-09-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134092117","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Impact Force Control of High-Speed Wire Bonding Machine Based on Fuzzy Active Disturbance Rejection Controller","authors":"Yachao Liu, Jian Gao, Boyu Zhan, Lanyu Zhang","doi":"10.1109/ICEPT52650.2021.9567904","DOIUrl":"https://doi.org/10.1109/ICEPT52650.2021.9567904","url":null,"abstract":"Improving the dynamic performance of impact force control is one of the key factors to ensure the bonding quality in wire bonding processes of IC microelectronics products. A fuzzy active disturbance rejection control (fuzzy ADRC) method is proposed to reduce the impact force and the consequent fluctuation of the bonding head. This control method uses a fuzzy controller to automatically adjust the control parameters of the error feedback controller based on the standard ADRC. With this fuzzy ADRC control method, the overshoot of the bonding head positioning response can be effectively reduced, and the fluctuation of the impact force can be controlled within a small region. The dynamic simulation model of impact force is established, and the design process of fuzzy ADRC control strategy for bonding head servo system is described in detail. Compared with conventional PID and fuzzy PID, simulation and experimental results demonstrate that the fuzzy ADRC control method can achieve better performance in reducing the impact force overshoot and force fluctuation. Therefore, the fuzzy ADRC control method for high dynamic Z-axis motion can improve bonding quality.","PeriodicalId":184693,"journal":{"name":"2021 22nd International Conference on Electronic Packaging Technology (ICEPT)","volume":"216 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-09-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134323374","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A Cost-saving Thermal Test Chip Design in a Test Vehicle of Large BGA","authors":"Jianjun Sun, Yuanting Lai, Hao Yang, Jian Pang, Tuobei Sun, Keqing Ouyang","doi":"10.1109/ICEPT52650.2021.9567990","DOIUrl":"https://doi.org/10.1109/ICEPT52650.2021.9567990","url":null,"abstract":"Special chip design for thermal test has been developed for a long time for assessment of package thermal characteristics, evaluation of material thermal performance, and validation of thermal models and simulations. Nevertheless, most of the thermal test chip design is independent from the real chip development, leading to thermal test chip hardly be used in the new products with advanced manufacture node and new packaging type. In this paper, we proposed a cost-saving thermal test chip which can be synchronously developed and combined with daisy chain design for package reliability test. This thermal test chip contains metal strip resistors for heating and resistive temperature sensor for temperature monitor. It helps to study the package thermal characteristics and evaluate the performance and reliability of thermal interface material applied in flip-chip ball grid array package.","PeriodicalId":184693,"journal":{"name":"2021 22nd International Conference on Electronic Packaging Technology (ICEPT)","volume":"111 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-09-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131543946","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Qiang Liu, J. Wen, Yu Zhang, Yu Liu, Guannan Yang, Zhongwei Huang, C. Cui
{"title":"Study on Performance Optimization of Nanometer Copper Paste","authors":"Qiang Liu, J. Wen, Yu Zhang, Yu Liu, Guannan Yang, Zhongwei Huang, C. Cui","doi":"10.1109/ICEPT52650.2021.9568120","DOIUrl":"https://doi.org/10.1109/ICEPT52650.2021.9568120","url":null,"abstract":"In this paper, in order to improve the sintering property of copper paste as interconnection material, the influence of solvent content and solvent type in copper paste on sintering strength was studied, so as to select the solvent type and solvent content with the best sintering effect. A certain amount of solvents such as ethylene glycol, diethylene glycol, glycerol and terpineol were added into the copper nanoparticles with an average particle size of 100nm-400nm. After mixing and vacuum homogenization, the nano-copper paste with solid content of 85% was obtained. Four kinds of copper pastes were sintered in 260°C sintering temperature, 2MPa sintering pressure, 5% hydrogen and 95% argon mixture for 30min to obtain interconnection joints. Furthermore, the shear strength of the sintered joints was tested. The shear strength of the copper paste prepared with ethylene glycol as solvent is 50.1 MPa, while the shear strength of the copper paste prepared with the other three solvents is less than 50 MPa. Then, ethylene glycol was added into copper nanoparticles as solvent to prepare copper paste with solid content of 55%, 70% and 85%, respectively. Pure copper nanoparticles were used as control group. The above four groups of samples were sintered in 260 $^{circ} mathrm{C}$ sintering temperature, 2MPa sintering pressure, 5% hydrogen and 95% argon mixture for 30min to obtain the interconnection joint. Finally, the shear strength of four kinds of interconnects was tested, and the shear strength of the interconnects sintered with 85% solid content copper paste was the highest, reaching 50.1MPa. In conclusion, the best sintering performance can be obtained by adding ethylene glycol as solvent into copper powder to form a paste with solid content of 85%, which can reach 50.1MPa. The surface morphology of the failure surfaces of the interconnection joints was observed by scanning electron microscopy.","PeriodicalId":184693,"journal":{"name":"2021 22nd International Conference on Electronic Packaging Technology (ICEPT)","volume":"95 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-09-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131572192","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Design and Analysis of a Fast-Speed Flip-Chip Bonding System with Force Control","authors":"Zhongyuan Zhu, Hui Tang, Jiedong Li, Sifeng He","doi":"10.1109/ICEPT52650.2021.9568191","DOIUrl":"https://doi.org/10.1109/ICEPT52650.2021.9568191","url":null,"abstract":"Force sensing and control functions are very important for flip chip bonding systems for the reason of purchasing high-quality chip interconnection. But it is regrettable that, using the existing commercial technology and equipment, the bonding interconnection procedure is hard to be performed perfectly, specifically in the aspects of efficiency, accuracy and quality. There are many processes involved in the bonding interconnection procedure, so as to say, we need to take as far as possible every step and aspect into consideration. This paper proposed a highspeed flip-chip bonding system with force control, which can make the chips after alignment be bonded on substrate well as soon as possible. In the first place, benefited from the work of our predecessors, the active soft-landing (ASL) interconnection is realized by using the advantages of the monolithic force integrated flexible bonding device. However, the adopted flexure bonder is not enough to satisfy the high-efficiency flip-chip bonding requirement. Because the lightly-damping second-order spring system characteristic caused by the force detective part of the adopted flexure bonder. Secondly, based on the flip-chip bonding process, a flexure-based switch is designed to change the unidirectional stiffness of the bonder with the property of force detection for the purpose of reducing the vibration caused by the linear motor braking in the process. Thirdly, a novel closed-loop control strategy which can accommodate the requirements of position and force, namely hybrid position/force closed-loop (HPFC) control, with integrator composed of inertial filter (ICIF) is proposed to realize the high-efficiency force control under high-dynamic working conditions. By adopting these methods above, the bonding system can go through each step of chip bonding after alignment fleetest, and provide high-quality chip interconnection at the same time.","PeriodicalId":184693,"journal":{"name":"2021 22nd International Conference on Electronic Packaging Technology (ICEPT)","volume":"136 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-09-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131723437","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Yan Luo, Kai Liu, Qiujuan Gao, Lei Ding, Yi Zhou, Lichun Wang
{"title":"Research on Conformal Phased Array T/ R Module Based on LCP Substrate","authors":"Yan Luo, Kai Liu, Qiujuan Gao, Lei Ding, Yi Zhou, Lichun Wang","doi":"10.1109/ICEPT52650.2021.9568185","DOIUrl":"https://doi.org/10.1109/ICEPT52650.2021.9568185","url":null,"abstract":"In the conformal phased array radar, the flexible surface T/R module based on LCP substrate was studied to solve the problems such as the mismatching between components and the antenna plane and the system instability caused by the increase of plug and unplug of cable connection. The LCP laminating quality control and the chip embedding was investigated. The assembly stress on LCP multi-layer substrate was analyzed with ANSYS. The results show that optimized lamination process with auxiliary material makes the substrate flat without cavity inside. The air tightness of LCP substrate embedded with MMIC is 7.4× 10–7 Pa . m3/s. The simulation results show that the stress increases rapidly between temperature of -55 and 80 degree centigrade when the LCP substrate's bending angle is greater than 10 degrees. The conformal T/R module remains well performance with LCP substrate bending 10 degrees. The LCP substrate has a good potential in conformal phased array.","PeriodicalId":184693,"journal":{"name":"2021 22nd International Conference on Electronic Packaging Technology (ICEPT)","volume":"178 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-09-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127585173","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
D. Yu, Zhihao Yin, Guanghui Liu, Hongyan Xu, Ju Xu
{"title":"Studies on the Effects of Soldering Layer Structures on TEC Module Performance and Thermal Stress","authors":"D. Yu, Zhihao Yin, Guanghui Liu, Hongyan Xu, Ju Xu","doi":"10.1109/ICEPT52650.2021.9568022","DOIUrl":"https://doi.org/10.1109/ICEPT52650.2021.9568022","url":null,"abstract":"Effects of soldering layer structures on the performance and thermal stress of thermoelectric cooling device (TEC) were studied by employing a three-dimensional finite element electric-thermal-mechanical modeling method established via COMSOL simulations. AuSn eutectic alloys and SnSb soldering were applied as joints to connect TE legs and metal bonded ceramic substrate (MBCs) for TEC's hot and cold ends, respectively. The temperature and stress distribution effects of the device based on different soldering layer structures were analyzed. The soldering layer structures include thickness, void size, number of voids, and void distribution. The results showed the maximum heat dissipation rate (Qmax), the maximum temperature difference(ΔTmax), and the related coefficient-of-performance (COP) of the device are decreased due to the reduction of the thickness of the soldering layer and the number of voids. Also, the more voids in the soldering layer greatly enhanced the maximum stress and temperature gradient. This enhancement will be more obvious when the voids stayed at the edge of the soldering layers.","PeriodicalId":184693,"journal":{"name":"2021 22nd International Conference on Electronic Packaging Technology (ICEPT)","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-09-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129375460","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Simulation and experimental analysis of a cost-effective miniaturized transceiver for X-band application","authors":"Y. Ban, Jie Liu","doi":"10.1109/ICEPT52650.2021.9568017","DOIUrl":"https://doi.org/10.1109/ICEPT52650.2021.9568017","url":null,"abstract":"In this paper, the design, development and realization of an X-band transceiver in a system-level solution with high performance and a compact size is investigated and verified by the experimental results. Multi-layer low loss substrate based system-in-package (SiP) technology, which integrates digital/analog integrated circuits, monolithic microwave integrated circuits (MMICs) and passive devices, is one of the best candidates for RF system-level integration due to its advantages of low loss, high integration capability and low cost. The electrical model of MMICs, such as: power amplifier (PA), low noise amplifier (LNA), have been respectively created and combined, in order to achieve an overall test-bench for the performance investigation of the X-band transceiver. The output amplitude and phase of the transmitter are simulated and characterized, respectively, in order to validate the design and to prove the accuracy of the MMIC models. In addition, the essential passive components and chip-chip interconnections such as wire-bonding, transmission lines are individually modeled and integrated in the SiP. The interconnection loss between MMICs should be carefully analyzed in the co-integration, and the choice of the packaging method and the in-package transmission line structure is crucial to ensure a good RF performance. A 3-dimensional (3D) system-level package is implemented on a low dk/df substrate which ensures a good radio-frequency (RF) performance with reasonable fabrication cost. Though wire-bonding technique is still feasible for the microwave and millimeter-wave application, the performance of flip-chip technology is more suitable for the high frequency application. Therefore, a combination of wire-bonding and flip-chip has been applied in the final prototype. Finally, both simulation and measurement results of the output amplitude and phase are analyzed and compared, in order to validate the package design flow and electrical modeling.","PeriodicalId":184693,"journal":{"name":"2021 22nd International Conference on Electronic Packaging Technology (ICEPT)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-09-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130820666","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pengchang Wang, Maoliang Jian, Chi Zhang, Majiaqi Wu, Huaying Hu, Lianqiao Yang
{"title":"Highly Conductive Silver Nanowire Transparent Electrodes Hybridized with Laminated Multi-Layer MXene","authors":"Pengchang Wang, Maoliang Jian, Chi Zhang, Majiaqi Wu, Huaying Hu, Lianqiao Yang","doi":"10.1109/ICEPT52650.2021.9567935","DOIUrl":"https://doi.org/10.1109/ICEPT52650.2021.9567935","url":null,"abstract":"Silver nanowires (AgNWs) and new-type two-dimensional material MXene have shown great prospects for applications in new-generation flexible electronic devices due to their brilliant properties. In this work, high-performance silver nanowire/MXene hybrid transparent conductive electrodes (TCEs) were prepared by a solution method. It studied the influence of AgNW concentration on the photoelectric properties of TCEs. Then, several-layer or even single-layer MXene were obtained by a delamination process and were added to the AgNW networks to prepared flexible hybrid electrodes on polyethylene naphtholate (PEN) substrates. The hybrid TCEs showed a low sheet resistance of 24.4 Ω/sq with the transmittance of 90.6% at 550nm. Moreover, the MXene sheets covered on the surface could improve the conductivity of the film and block the oxidation of silver nanowires. The results mean that the novel AgNW/MXene TCEs have great potential for the practical applications of high-performance flexible electronic devices.","PeriodicalId":184693,"journal":{"name":"2021 22nd International Conference on Electronic Packaging Technology (ICEPT)","volume":"62 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-09-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133181242","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}