2021 22nd International Conference on Electronic Packaging Technology (ICEPT)最新文献_第10页

Finite Element Simulation Study of Interfacial Crack Propagation in the Underfilled FC-BGA Package 欠填充FC-BGA封装界面裂纹扩展的有限元模拟研究

2021 22nd International Conference on Electronic Packaging Technology (ICEPT) Pub Date : 2021-09-14 DOI: 10.1109/ICEPT52650.2021.9568043

Hao Wang, Min-bo Zhou, Jiu-Bin Fei, Li Sun, Bing-Xian Yang, Wei-Lin Hu, C. Ke, Xin-Ping Zhang

{"title":"Finite Element Simulation Study of Interfacial Crack Propagation in the Underfilled FC-BGA Package","authors":"Hao Wang, Min-bo Zhou, Jiu-Bin Fei, Li Sun, Bing-Xian Yang, Wei-Lin Hu, C. Ke, Xin-Ping Zhang","doi":"10.1109/ICEPT52650.2021.9568043","DOIUrl":"https://doi.org/10.1109/ICEPT52650.2021.9568043","url":null,"abstract":"Flip chip ball grid array (FC-BGA) has been used widely since mid-late 1990s as a high-density package technology. The use of underfill can improve the stability and reliability of the package. However, due to the mismatch of coefficient of thermal expansion (CTE), cracking and subsequent propagation are more likely to occur at the interface related to underfill such as underfill/die, underfill/passivation and underfill/solder-mask interfaces, which has become a serious concern for package reliability. In this paper, the propagation behavior of crack at bimaterial interfaces of underfill/die, underfill/passivation and underfill/solder-mask are analyzed by two-dimensional (2D) Virtual Crack Closure Technique (VCCT). The propagation tendency of different interfacial cracks and possible failure forms of the package are predicted according to calculation of fracture mechanics parameters (e.g., energy release rate, G and phase angle, ψ). The effects of temperature on energy release rate are also investigated. Simulation results show that cracks located at different interfaces show distinct propagation tendencies and may lead to different failure forms. The energy release rate increases with temperature when below glass transition temperature (Tg) of underfill. But when temperature reaches Tg, the change of energy release rate depends on the degree of softening effect of underfill and the worsened mismatch of thermal expansion. The risk level of crack located at three different interfaces under thermal load seems to have the order from high to low as follows: underfill/passivation interface, underfill/die interface and underfill/solder-mask interface.","PeriodicalId":184693,"journal":{"name":"2021 22nd International Conference on Electronic Packaging Technology (ICEPT)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-09-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114908923","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Design and Verification of TDDB Test Structures For TSV TSV TDDB测试结构的设计与验证

2021 22nd International Conference on Electronic Packaging Technology (ICEPT) Pub Date : 2021-09-14 DOI: 10.1109/ICEPT52650.2021.9567977

Kai Li, Si Chen, Xiaofeng Yang, Guoyuan Li, Bin Zhou

引用次数: 0

Design method of triaxial vibration fixture for complex integrated circuits 复杂集成电路三轴振动夹具的设计方法

2021 22nd International Conference on Electronic Packaging Technology (ICEPT) Pub Date : 2021-09-14 DOI: 10.1109/ICEPT52650.2021.9568189

Xiaoqiang Wang, Bin Li, Chuanjin Deng, Rui Deng, Ruolei Wang, Kun Jiang

引用次数: 0

Extraction, Optimization and Failure Detection Application of Parasitic Inductance for High-Frequency SiC Power Devices 高频SiC功率器件寄生电感提取、优化及故障检测应用

2021 22nd International Conference on Electronic Packaging Technology (ICEPT) Pub Date : 2021-09-14 DOI: 10.1109/ICEPT52650.2021.9568012

Minghui Yun, Kailin Zhang, M. Cai, Yiren Yang, Changqi Feng, Song Wei, Daoguo Yang, Guoqi Zhang

{"title":"Extraction, Optimization and Failure Detection Application of Parasitic Inductance for High-Frequency SiC Power Devices","authors":"Minghui Yun, Kailin Zhang, M. Cai, Yiren Yang, Changqi Feng, Song Wei, Daoguo Yang, Guoqi Zhang","doi":"10.1109/ICEPT52650.2021.9568012","DOIUrl":"https://doi.org/10.1109/ICEPT52650.2021.9568012","url":null,"abstract":"Silicon carbide (SiC) is a third-generation semiconductor material with many advantages, such as high thermal conductivity, high critical breakdown voltage, and high saturated electron drift velocity, which can increase the operating frequency of the power conversion system to more than 100kHz. In the high-frequency, the parasitic effect will significantly reduce the switching speed of the power devices, increase power consumption and influence the uniformity of current distribution. In this paper, we established the calculation nodes of each part of the SiC-MOSFET Half-bridge power module and used ANSYS Q3D software to extract the parasitic parameters. Die-Die, Die-DBC-1, Die-DBC-2 and hybrid interconnect package structures were designed to optimize the parasitic inductance. Simulation results indicated that the chip-DBC-1 structure can reduce the parasitic inductance about 30% compared with Chip-Chip structure and effectively control the uniformity of current density on two parallel diode chips (ΔLdiode <0.1%). In the meantime, an 3D model of partial bond wires broken were designed to get further insight into the variation of parasitic inductances. The correlation mechanism between the partial bond wires broken and inductance change of the D-S terminals current path was studied. The results showed that as the number of broken bond wires increases, the inductance of D-S terminals current path was increased gradually. Finally, by using two-port S-parameters measurement method to extract the inductances of the discrete power device, the experimental results indicated that when one or two bond wires were broken, the inductance of D-S terminals current path increased by 4.69% and 15.69%, respectively. Overview, a risk evaluation method for SiC power devices based on the variation of the parasitic parameters of the bond wire was established.","PeriodicalId":184693,"journal":{"name":"2021 22nd International Conference on Electronic Packaging Technology (ICEPT)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-09-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133208481","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Measurement Process Optimization in Using Lock-in Thermography for Fault Localization of CoWos Packages 利用锁定热成像技术优化coos封装故障定位的测量过程

2021 22nd International Conference on Electronic Packaging Technology (ICEPT) Pub Date : 2021-09-14 DOI: 10.1109/ICEPT52650.2021.9568152

S. Chao, Na Mei, Xin-rong Lin, Tuobei Sun, Dan Yang, Keqing Ouyang

{"title":"Measurement Process Optimization in Using Lock-in Thermography for Fault Localization of CoWos Packages","authors":"S. Chao, Na Mei, Xin-rong Lin, Tuobei Sun, Dan Yang, Keqing Ouyang","doi":"10.1109/ICEPT52650.2021.9568152","DOIUrl":"https://doi.org/10.1109/ICEPT52650.2021.9568152","url":null,"abstract":"This paper mainly investigation on defect localization application of CoWos (Chip on Wafer on Substrate) packaging through lock-in thermography. When failure samples are rare, it is necessary to use non-destructive Thermal EMMI to detect hot spots, and determine the defect Z-depth of CoWos packaging by lock-in thermography and PFA (Physical failure analysis) methods. We found that at different lock-in frequencies, the amplitudes of the hot spots were basically 10mK, but during the second exposure of 3 minutes at different frequencies, the phase differed greatly, and not even every lock-in frequency could detect the effective hot spots. It is considerable to select the appropriate lock-in frequency to get the optimal hot spot for the fault. In this paper, the concept of standard deviation is introduced into the optimal choice of hot spots. The frequency with the minimum standard deviation of phase is selected as optimal condition for failure localization. The lock-in thermography can not only quickly determine the Z-depth of fault refer to good pin or phase of each structure of CoWos chip, but also select optimal hot spot XY coordinate through the standard deviation of phase. An optimal lock-in frequency of certain hot spot on die or substrate layer are identified through a series of experiments. It is noticeable that optimal hot spot through the minimum standard deviation of phase can impove the accuracy of fault location and the success rate of subsequent physical analysis.","PeriodicalId":184693,"journal":{"name":"2021 22nd International Conference on Electronic Packaging Technology (ICEPT)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-09-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133240643","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Microstructures Properties of barium-strontium titanate (BST) ceramics Doped with B-Li Glasses for LTCC Technology Applications 掺杂B-Li玻璃的钛酸钡锶(BST)陶瓷在LTCC技术中的微结构特性

2021 22nd International Conference on Electronic Packaging Technology (ICEPT) Pub Date : 2021-09-14 DOI: 10.1109/ICEPT52650.2021.9567958

L. Tang, Xiaofeng Sun, Minghua Zhang, C. Wan

引用次数: 0

Significant Effect of Temperature and Solders on The Growth Behavior of CU6Sn5 on (110) Cu Single Crystal 温度和钎料对CU6Sn5在(110)Cu单晶上生长行为的影响

2021 22nd International Conference on Electronic Packaging Technology (ICEPT) Pub Date : 2021-09-14 DOI: 10.1109/ICEPT52650.2021.9567962

C. Dong, M. Shang, Yingli Guo, Xiangxu Chen, J. Zhang, Changlong Dong, Haoran Ma, Haitao Ma

{"title":"Significant Effect of Temperature and Solders on The Growth Behavior of CU6Sn5 on (110) Cu Single Crystal","authors":"C. Dong, M. Shang, Yingli Guo, Xiangxu Chen, J. Zhang, Changlong Dong, Haoran Ma, Haitao Ma","doi":"10.1109/ICEPT52650.2021.9567962","DOIUrl":"https://doi.org/10.1109/ICEPT52650.2021.9567962","url":null,"abstract":"The package interconnect in integrated electronic components is realized by Interfacial intermetallic compounds (IMC). Meanwhile, the downsizing of µ-bumps to tens of microns in advanced 3D packaging will result in the overgrowth of IMC and the number of grains contained in UBM decreased sharply, which bring new challenge for the reliability of solder joints. For this condition, numerous researches about the growth of IMC generated at the solder/Cu single crystal interface have been reported. For this paper, the growth of IMC at the interface between different solder, i.e., Sn, Sn-2Ag, Sn-3Ag, and (110) Cu single crystal at different temperature, i.e., 230°C, 250°C, 300°C, were investigated. Scanning electron microscope (SEM) and electron backscattered diffraction (EBSD) was used to characterize the morphology and orientation of Cu6Sn5, respectively. Results shows that the CU6Sn5 formed on (110) Cu exhibit worm type at lower temperature and were tends to transform into facet type at higher temperature. Furthermore, the reflow temperature make a difference in the formation of Cu6Sn5 orientation. Besides, the coarsening rate of CU6Sn5 was promoted following the increase of the Ag. The results have a significant meaning in controlling the orientation and improving the reliability of micro solder joints.","PeriodicalId":184693,"journal":{"name":"2021 22nd International Conference on Electronic Packaging Technology (ICEPT)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-09-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131748708","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Effect of Ni-CNTs on wetting properties, microstructure, and creep resistance of Sn58Bi-0.1Er composite solder Ni-CNTs对Sn58Bi-0.1Er复合钎料润湿性能、显微组织和抗蠕变性能的影响

2021 22nd International Conference on Electronic Packaging Technology (ICEPT) Pub Date : 2021-09-14 DOI: 10.1109/ICEPT52650.2021.9568164

Qi Li, Fengmei Liu, Y. Yi, Xueying Zhang, Haitao Gao

引用次数: 0

A 3D TSV-MEMS Based Heterogeneous Integration Technology for RF Application 基于三维TSV-MEMS的射频应用异构集成技术

2021 22nd International Conference on Electronic Packaging Technology (ICEPT) Pub Date : 2021-09-14 DOI: 10.1109/ICEPT52650.2021.9567915

Min Huang, Tinglei Wang, F. Hou, Ping Su, Chao Sun, Huakai Luan

引用次数: 1

Study on the Influence of Different Filler Fractions on the Properties of Thermal Interface Materials 不同填料含量对热界面材料性能影响的研究

2021 22nd International Conference on Electronic Packaging Technology (ICEPT) Pub Date : 2021-09-14 DOI: 10.1109/ICEPT52650.2021.9568054

W. Ye, Zhenyu Wang, Xiangliang Zeng, L. Ren, Rong Sun, Zhibin Wen, Xiaoliang Zeng

引用次数: 0