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Conference Proceedings. IEEE Canadian Conference on Electrical and Computer Engineering (Cat. No.98TH8341)最新文献

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Low power conditional sum adder using pass logic topology 低功耗条件和加法器使用通逻辑拓扑
Conference Proceedings. IEEE Canadian Conference on Electrical and Computer Engineering (Cat. No.98TH8341) Pub Date : 1998-05-24 DOI: 10.1109/CCECE.1998.682537
D. Saleem, D. Al-Khalili
{"title":"Low power conditional sum adder using pass logic topology","authors":"D. Saleem, D. Al-Khalili","doi":"10.1109/CCECE.1998.682537","DOIUrl":"https://doi.org/10.1109/CCECE.1998.682537","url":null,"abstract":"The Low Power Conditional Sum Adder (CSA) has been analyzed using various logic styles. Pass logic topology implementation offered low power delay product and occupied less silicon area compared to other topologies. A test chip for two versions of the CSA using pass logic and standard CMOS has been designed and fabricated using 0.5 /spl mu/ CMOS technology. Test results indicate that 50% power saving has been achieved in Pass Logic CSA.","PeriodicalId":177613,"journal":{"name":"Conference Proceedings. IEEE Canadian Conference on Electrical and Computer Engineering (Cat. No.98TH8341)","volume":"252 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-05-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133725367","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
A low-loss 2D-C-L-R resonant snubber for single-switch soft-switching boost DC/DC converters 用于单开关软开关升压DC/DC转换器的低损耗2D-C-L-R谐振缓冲器
Conference Proceedings. IEEE Canadian Conference on Electrical and Computer Engineering (Cat. No.98TH8341) Pub Date : 1998-05-24 DOI: 10.1109/CCECE.1998.685633
D. Garabandic, M. Kuzmanović, W. Dunford
{"title":"A low-loss 2D-C-L-R resonant snubber for single-switch soft-switching boost DC/DC converters","authors":"D. Garabandic, M. Kuzmanović, W. Dunford","doi":"10.1109/CCECE.1998.685633","DOIUrl":"https://doi.org/10.1109/CCECE.1998.685633","url":null,"abstract":"A novel 2D-C-L-R resonant snubber for single-switch soft-switching boost DC/DC converters is introduced. This snubber ensures a zero current turn-on and zero-voltage turn-off of the transistor. The turn-off of the diode is soft. The principles of operation and simulation results are presented.","PeriodicalId":177613,"journal":{"name":"Conference Proceedings. IEEE Canadian Conference on Electrical and Computer Engineering (Cat. No.98TH8341)","volume":"131 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-05-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115191285","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Comparing reactance one-port and notch filters for voltage and current harmonic reduction in nonlinear distribution systems 比较电抗单端滤波器和陷波滤波器在非线性配电系统中抑制电压和电流谐波的作用
Conference Proceedings. IEEE Canadian Conference on Electrical and Computer Engineering (Cat. No.98TH8341) Pub Date : 1998-05-24 DOI: 10.1109/CCECE.1998.685632
E. El-Saadany, M. Salama, A. Chikhani
{"title":"Comparing reactance one-port and notch filters for voltage and current harmonic reduction in nonlinear distribution systems","authors":"E. El-Saadany, M. Salama, A. Chikhani","doi":"10.1109/CCECE.1998.685632","DOIUrl":"https://doi.org/10.1109/CCECE.1998.685632","url":null,"abstract":"Harmonic distortion in distribution systems has escalated in recent years due to the widespread use of different nonlinear and electronically switched loads. This paper deals with decreasing the harmonics in three-phase four-wire distribution systems loaded with different nonlinear loads. Two approaches have been implemented in order to achieve the desired goal. The first is the utilization of a reactance one-port compensator and the second is the use of notch filters tuned at the prospective harmonics to be eliminated. A concrete example is given to demonstrate the differences between both methods. The harmonic analysis is carried out in the time-domain utilizing the EMTP package in order to accurately represent both system nonlinearity and voltage dependency.","PeriodicalId":177613,"journal":{"name":"Conference Proceedings. IEEE Canadian Conference on Electrical and Computer Engineering (Cat. No.98TH8341)","volume":"429 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-05-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116001135","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Steady state analysis of an auto-sequential commutated current source inverter (ASCI) with squirrel cage motor drive 鼠笼式电机驱动的自动顺序换相电流源逆变器的稳态分析
Conference Proceedings. IEEE Canadian Conference on Electrical and Computer Engineering (Cat. No.98TH8341) Pub Date : 1998-05-24 DOI: 10.1109/CCECE.1998.685566
A. Essadki, M. Cherkaoui
{"title":"Steady state analysis of an auto-sequential commutated current source inverter (ASCI) with squirrel cage motor drive","authors":"A. Essadki, M. Cherkaoui","doi":"10.1109/CCECE.1998.685566","DOIUrl":"https://doi.org/10.1109/CCECE.1998.685566","url":null,"abstract":"This paper gives the analysis and design by state plane method of a current source inverter with induction motor. The basic operation of an auto-sequentially commutated current-source inverter (ASCI) connected to an induction motor load is detailed elsewhere and will not be repeated here. Each 60/spl deg/ period of the inverter operation with noovelap consists of three successive modes, viz charging, transfer, and single flow mode. The induction motor is modeled as a series equivalent circuit per phase but in this paper the analysis and design of a current source inverter with induction motor has been effected by a state plane method. The analytical results obtained by state plane method are compared with experimental and computed results and a good agreement between them shows the validity and effectiveness of this method.","PeriodicalId":177613,"journal":{"name":"Conference Proceedings. IEEE Canadian Conference on Electrical and Computer Engineering (Cat. No.98TH8341)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-05-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116304188","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
An improved structured light technique for surface reconstruction of the human trunk 一种用于人体躯干表面重建的改进结构光技术
Conference Proceedings. IEEE Canadian Conference on Electrical and Computer Engineering (Cat. No.98TH8341) Pub Date : 1998-05-24 DOI: 10.1109/CCECE.1998.685637
N. Durdle, J. Thayyoor, V. Raso
{"title":"An improved structured light technique for surface reconstruction of the human trunk","authors":"N. Durdle, J. Thayyoor, V. Raso","doi":"10.1109/CCECE.1998.685637","DOIUrl":"https://doi.org/10.1109/CCECE.1998.685637","url":null,"abstract":"A system using structured light and image-processing techniques for the measurement of three-dimensional surface of the human back is presented. The system can be applied to the measurement of scoliosis. The operation of the system including image-processing algorithms has been described.","PeriodicalId":177613,"journal":{"name":"Conference Proceedings. IEEE Canadian Conference on Electrical and Computer Engineering (Cat. No.98TH8341)","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-05-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123629600","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 37
ISAR imaging radar with time-domain high-range resolution algorithms and array antenna ISAR成像雷达的时域高分辨算法和阵列天线
Conference Proceedings. IEEE Canadian Conference on Electrical and Computer Engineering (Cat. No.98TH8341) Pub Date : 1998-05-24 DOI: 10.1109/CCECE.1998.682549
C. Bouchard, D. Grenier
{"title":"ISAR imaging radar with time-domain high-range resolution algorithms and array antenna","authors":"C. Bouchard, D. Grenier","doi":"10.1109/CCECE.1998.682549","DOIUrl":"https://doi.org/10.1109/CCECE.1998.682549","url":null,"abstract":"To increase the range resolution in ISAR imaging radar, time adaptations of the MUSIC algorithm and of Capon MLM are applied on each azimuth bin. The covariance matrix of each azimuth bin is estimated from the corresponding azimuth bin of ISAR images made with different carrier frequencies to avoid cross-correlation between scatterers. Simulation results are shown as well as some preliminary measurement processings.","PeriodicalId":177613,"journal":{"name":"Conference Proceedings. IEEE Canadian Conference on Electrical and Computer Engineering (Cat. No.98TH8341)","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-05-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121996841","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Real-time system design: a temporal perspective 实时系统设计:时间视角
Conference Proceedings. IEEE Canadian Conference on Electrical and Computer Engineering (Cat. No.98TH8341) Pub Date : 1998-05-24 DOI: 10.1109/CCECE.1998.682770
M. Saksena
{"title":"Real-time system design: a temporal perspective","authors":"M. Saksena","doi":"10.1109/CCECE.1998.682770","DOIUrl":"https://doi.org/10.1109/CCECE.1998.682770","url":null,"abstract":"The design of a real-time system must not only incorporate means of tackling functional complexity, but also means to analyze and predict real-time temporal properties. Unfortunately, most design methods provide little support to a designer towards meeting the real-time performance specifications of the system. The design of a system involves many parameters which are artifacts of the system design, and for a given system may be chosen in many different ways to meet the performance requirements of a system. In this paper, I present a summary of recent research work that is aimed at developing a set of techniques that can be used by a designer in choosing design artifacts such as periodicities, deadlines, priorities, etc., so as to design a system that will predictably satisfy the performance specifications. We expect that the techniques presented in this paper will help reduce the laborious process of designing a real-time system, by bringing resource contention and schedulability aspects early into the design process.","PeriodicalId":177613,"journal":{"name":"Conference Proceedings. IEEE Canadian Conference on Electrical and Computer Engineering (Cat. No.98TH8341)","volume":"96 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-05-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124120474","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 19
Surface reconstruction from tomography data 从断层扫描数据重建表面
Conference Proceedings. IEEE Canadian Conference on Electrical and Computer Engineering (Cat. No.98TH8341) Pub Date : 1998-05-24 DOI: 10.1109/CCECE.1998.685584
R. El-Daccache, R. Noumeir
{"title":"Surface reconstruction from tomography data","authors":"R. El-Daccache, R. Noumeir","doi":"10.1109/CCECE.1998.685584","DOIUrl":"https://doi.org/10.1109/CCECE.1998.685584","url":null,"abstract":"We propose a method to reconstruct the surface of a three-dimensional (3D) object from its volume. We use an active surface model which is a 3D generalization of the basic two-dimensional (2D) model. The model is an elastic surface that is deformed under the action of internal and external forces. The internal forces model the smoothness constraints while the external forces model the image constraints. In our case, the image constraints are 3D detected edges obtained using the Zucker and Hummel (1981) operator. The finite difference method is used to solve the energy-minimization problem for a surface. The proposed method is used for the segmentation of the patient body from the tomography reconstruction in nuclear medicine. The body surface in nuclear medicine is very important in order to model the attenuation of the photons.","PeriodicalId":177613,"journal":{"name":"Conference Proceedings. IEEE Canadian Conference on Electrical and Computer Engineering (Cat. No.98TH8341)","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-05-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124861429","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Performance evaluation of dynamic bandwidth assignment for wireless ATM networks 无线ATM网络动态带宽分配的性能评价
Conference Proceedings. IEEE Canadian Conference on Electrical and Computer Engineering (Cat. No.98TH8341) Pub Date : 1998-05-24 DOI: 10.1109/CCECE.1998.685644
O. Kubbar, H. Mouftah
{"title":"Performance evaluation of dynamic bandwidth assignment for wireless ATM networks","authors":"O. Kubbar, H. Mouftah","doi":"10.1109/CCECE.1998.685644","DOIUrl":"https://doi.org/10.1109/CCECE.1998.685644","url":null,"abstract":"We present a performance analysis of the slotted Aloha scheme as a channel access method for a hybrid medium access control (MAC) protocol for multimedia wireless networks. The performance of this Aloha (embedded Aloha) scheme is compared with the stand-alone Aloha scheme and some useful results and conclusions are drawn. In addition, the importance of some performance measures are identified and their impact on QoS provisioning is defined.","PeriodicalId":177613,"journal":{"name":"Conference Proceedings. IEEE Canadian Conference on Electrical and Computer Engineering (Cat. No.98TH8341)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-05-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128283530","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A method for redesign for testability at the RT level 一种在RT级别重新设计可测试性的方法
Conference Proceedings. IEEE Canadian Conference on Electrical and Computer Engineering (Cat. No.98TH8341) Pub Date : 1998-05-24 DOI: 10.1109/CCECE.1998.682706
H. Harmanani, S. Harfoush
{"title":"A method for redesign for testability at the RT level","authors":"H. Harmanani, S. Harfoush","doi":"10.1109/CCECE.1998.682706","DOIUrl":"https://doi.org/10.1109/CCECE.1998.682706","url":null,"abstract":"A new method of redesign for testability at the register-transfer level (RTL) is proposed. The method identifies hard to test parts of a an RTL design synthesized either manually or automatically using high-level synthesis tools. The design is modified by inserting additional test registers followed by a test selection process. During the selection process, two test metrics are used in order to minimize test overhead. Finally, test scheduling is performed so that to minimize the overall test time and the number of test sessions. The system outputs a VHDL description of a testable data path along with a test plan.","PeriodicalId":177613,"journal":{"name":"Conference Proceedings. IEEE Canadian Conference on Electrical and Computer Engineering (Cat. No.98TH8341)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-05-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130022114","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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