Conference Proceedings. IEEE Canadian Conference on Electrical and Computer Engineering (Cat. No.98TH8341)最新文献

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MLSE in the presence of co-channel interference for radio portable channels 无线便携信道中存在同信道干扰时的MLSE
B. Hilal, C. Despins, J. Belzile
{"title":"MLSE in the presence of co-channel interference for radio portable channels","authors":"B. Hilal, C. Despins, J. Belzile","doi":"10.1109/CCECE.1998.685572","DOIUrl":"https://doi.org/10.1109/CCECE.1998.685572","url":null,"abstract":"In the literature, the performance of a receiver using a combined MLSE equalizer and D-diversity reception was analyzed for slow multipath Rayleigh fading channels. In this paper we extend the performance analysis to a system operating in the presence of co-channel interference. A new approach based on the characteristic function method is proposed to evaluate the pairwise error probability. An averaging procedure over all fading channels statistics of users in the system for the evaluation of this probability is needed. The evaluation of the bit error rate for a given number of users in the system can be computed by using a error-state diagram and the stack algorithm. Simulations results are also presented.","PeriodicalId":177613,"journal":{"name":"Conference Proceedings. IEEE Canadian Conference on Electrical and Computer Engineering (Cat. No.98TH8341)","volume":"171 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-05-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132178386","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
FPGA implementation of the guided scrambling line coding technique FPGA实现的导引置乱线编码技术
C. D. Murphy, L.C. Dickinson, I. Fair
{"title":"FPGA implementation of the guided scrambling line coding technique","authors":"C. D. Murphy, L.C. Dickinson, I. Fair","doi":"10.1109/CCECE.1998.685604","DOIUrl":"https://doi.org/10.1109/CCECE.1998.685604","url":null,"abstract":"The guided scrambling (GS) line coding technique was introduced by Fair, Grover, Krzymien, and MacDonald (1991) as a novel mechanism to ensure that binary transmitted sequences exhibit desirable line code characteristics. We describe a field programmable gate array (FPGA) implementation of GS. The system accommodates code words of up to 32 bits in length, with one or two augmenting bits per word. It permits specification of any scrambling polynomial with degree less than or equal to 32, and through the choice of two code word selection mechanisms, can be optimized for either high transition density or minimization of low frequency content. The system is used to verify theoretical expectations for the power spectral density of the encoded stream for various scrambling parameters, and to confirm expected trends in the statistics of encoded sequences for code configurations whose theoretical analysis is impractical.","PeriodicalId":177613,"journal":{"name":"Conference Proceedings. IEEE Canadian Conference on Electrical and Computer Engineering (Cat. No.98TH8341)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-05-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131312880","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
MCLGallery: a framework for multimedia communications research 多媒体通讯研究的框架
Li-Te Cheng, J. Robinson
{"title":"MCLGallery: a framework for multimedia communications research","authors":"Li-Te Cheng, J. Robinson","doi":"10.1109/CCECE.1998.682772","DOIUrl":"https://doi.org/10.1109/CCECE.1998.682772","url":null,"abstract":"MCLGallery is a C++ library with visual component templates to allow easy manipulation of multimedia data, real-time data transfer across networks and rapid prototyping in Windows 95. The design philosophy of MCLGallery is to enable researchers to prototype, develop, and implement applications ready for industrial and commercial audiences, while focusing the programming on the research, not the complexities of Windows 95. This is accomplished through the use of Powersoft's Power++ component template technology and building a library over powerful Windows 95 multimedia APIs.","PeriodicalId":177613,"journal":{"name":"Conference Proceedings. IEEE Canadian Conference on Electrical and Computer Engineering (Cat. No.98TH8341)","volume":"45 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-05-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125519650","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Development of EMTP-based active filter model for distribution system studies 基于emtp的配电系统有源滤波器模型的建立
R. Arora, V. Sood
{"title":"Development of EMTP-based active filter model for distribution system studies","authors":"R. Arora, V. Sood","doi":"10.1109/CCECE.1998.682554","DOIUrl":"https://doi.org/10.1109/CCECE.1998.682554","url":null,"abstract":"This paper presents an EMTP based model of an active filter (AF) suitable for simulation studies with distribution systems. The AF is a voltage source inverter (VSI) connected in parallel at the system bus. The AF supplies the reactive power and harmonics locally, causing the utility source to supply only the load active power and AF losses. A simple, yet effective hysteresis rule-based, carrierless current control scheme has been adopted to give satisfactory dynamic control. Simulation results from steady state and transient system studies are presented.","PeriodicalId":177613,"journal":{"name":"Conference Proceedings. IEEE Canadian Conference on Electrical and Computer Engineering (Cat. No.98TH8341)","volume":"75 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-05-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121443038","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
On the FPGA board level routing problem 关于FPGA板级路由问题
Xiaoyu Song, Yuke Wang
{"title":"On the FPGA board level routing problem","authors":"Xiaoyu Song, Yuke Wang","doi":"10.1109/CCECE.1998.682778","DOIUrl":"https://doi.org/10.1109/CCECE.1998.682778","url":null,"abstract":"We study a two-terminal board level routing problem applicable to FPGA-based logic emulation systems. The problem was studied by W. Mak and D.F. Wong (see IEEE Trans. CAD, vol.16, no.3, 1997), where an algorithm of O(n/sup 2/) time was proposed, where n is the number of nets. We present a new and simple O(n)-time routing algorithm for solving the problem. A new precise I/O capacity constraint for routability is given by taking other criteria (e.g., the number of chips) into consideration.","PeriodicalId":177613,"journal":{"name":"Conference Proceedings. IEEE Canadian Conference on Electrical and Computer Engineering (Cat. No.98TH8341)","volume":"67 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-05-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126277597","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Distributed advanced search techniques for circuit partitioning 分布式高级搜索电路划分技术
S. Areibi, A. Vannelli
{"title":"Distributed advanced search techniques for circuit partitioning","authors":"S. Areibi, A. Vannelli","doi":"10.1109/CCECE.1998.685556","DOIUrl":"https://doi.org/10.1109/CCECE.1998.685556","url":null,"abstract":"Parallel and distributed computing systems offer the promise of a quantum leap in the computing power that can be brought to bear on many important problems. The potential for distributed processing exists whenever there are several computers interconnected in some fashion so that a program or procedure running on one machine can transfer control to a procedure running on another. In such an environment we wish to assign optimally the modules of a program to specific processors. The main objective in optimizing is twofold, minimizing the running time of the program and improving the efficiency of the algorithm. Our main task in this work is to develop an environment that allows easy parallelization of the existing sequential algorithms, in which the potential parallelism fits easily into the sequential algorithm. This paper discusses techniques to parallelize advanced search heuristics (Areibi and Vannelli, 1994) used to solve the circuit partitioning problem.","PeriodicalId":177613,"journal":{"name":"Conference Proceedings. IEEE Canadian Conference on Electrical and Computer Engineering (Cat. No.98TH8341)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-05-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126308315","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Air traffic control trainer software development: multi-agent architecture and Java prototype 空中交通管制训练器软件开发:多代理体系结构和Java原型
J. Peters, R. Agatep, S. Cormier, N. Dack, S. Ip, F. Kaikhosrawkani, N. Lao, O. Orenstein, P. Thang, V. Wan, W. Wong
{"title":"Air traffic control trainer software development: multi-agent architecture and Java prototype","authors":"J. Peters, R. Agatep, S. Cormier, N. Dack, S. Ip, F. Kaikhosrawkani, N. Lao, O. Orenstein, P. Thang, V. Wan, W. Wong","doi":"10.1109/CCECE.1998.685568","DOIUrl":"https://doi.org/10.1109/CCECE.1998.685568","url":null,"abstract":"This paper reports work on the development of a feedback system model for prototyping an air traffic control trainer (tATC). The feedback system itself represents a cleanroom engineering process designed as a closed loop containing decider, effector, and measure processes with reference values taken from a cleanroom plan and software engineering guide. The project-specific and atomic (task specific) models of a feedback system used to develop a tATC are described. Five concurrent processes (weather, airspace, aircraft, airport, and score) drive the scan subsystem of the tATC. Each of these process has an agent architecture. Each agent functions as an independent entity capable of interacting with other agents and the environment. A statechart describing the entire process structure of the tATC is given. This statechart is decomposed to reveal both the structure of subprocesses, the relationships between subprocesses of the tATC, and to provide a blueprint for tATC prototypes. The aircraft display process is described. The detailed design of the tATC is carried out with Java. The contribution of this paper is the presentation of a specific feedback system model useful in developing prototypes for a tATC.","PeriodicalId":177613,"journal":{"name":"Conference Proceedings. IEEE Canadian Conference on Electrical and Computer Engineering (Cat. No.98TH8341)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-05-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126596703","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A real-time implementation of optimal reactive power flow 最优无功潮流的实时实现
S. Sharif, J.H. Taylor, E. Hill
{"title":"A real-time implementation of optimal reactive power flow","authors":"S. Sharif, J.H. Taylor, E. Hill","doi":"10.1109/CCECE.1998.682712","DOIUrl":"https://doi.org/10.1109/CCECE.1998.682712","url":null,"abstract":"The application of optimal reactive power flow (ORPF) problem to the NB (New Brunswick) Power company are presented. The potential benefits and the real-time implementation problems of ORPF are discussed. The execution of ORPF program for NE Power network has shown two major benefits: (1) the improvement in the voltage profile and voltage stability, and (2) the savings in active power loss. The improvement in voltage profile can cause less violations and a more stable system from the voltage point of view. A reduction in active power loss gained from ORPF can save a significant amount of money. The total saving for year 1995 predicted in study was in excess of $1100000, and this was supported by the real-time test. These savings can be gained simultaneously with the improvement of the voltage profiles.","PeriodicalId":177613,"journal":{"name":"Conference Proceedings. IEEE Canadian Conference on Electrical and Computer Engineering (Cat. No.98TH8341)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-05-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121215889","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A modified leaky bucket policing mechanism 改进的漏桶监管机制
Z. Liang, M.M. Ali
{"title":"A modified leaky bucket policing mechanism","authors":"Z. Liang, M.M. Ali","doi":"10.1109/CCECE.1998.682755","DOIUrl":"https://doi.org/10.1109/CCECE.1998.682755","url":null,"abstract":"This paper proposes an unbuffered modified leaky-bucket algorithm to police the traffic of on-off bursty sources. We assume the leaky-bucket has no token pool and cell buffer, and the token generation process has two states: on and off. The tokens are generated at the same rate with the source's peak cell rate during the on period, and no tokens are generated during the off period. With this algorithm we can police both the peak source rate and the sustain cell rate of bursty sources with simply one leaky-bucket.","PeriodicalId":177613,"journal":{"name":"Conference Proceedings. IEEE Canadian Conference on Electrical and Computer Engineering (Cat. No.98TH8341)","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-05-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116631592","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A transformer protection technique with immunity to CT saturation and ratio-mismatch conditions 一种抗CT饱和和比例失配的变压器保护技术
T. S. Sidhu, H. S. Gill, M. S. Sachdev
{"title":"A transformer protection technique with immunity to CT saturation and ratio-mismatch conditions","authors":"T. S. Sidhu, H. S. Gill, M. S. Sachdev","doi":"10.1109/CCECE.1998.682740","DOIUrl":"https://doi.org/10.1109/CCECE.1998.682740","url":null,"abstract":"This paper describes a digital technique for protecting power transformers. The technique uses positive- and negative-sequence models of the power system in a fault-detection algorithm. The phase voltages and currents at the transformer terminals are used to detect faults. The performance of the proposed technique was studied for a variety of operating conditions using simulated data. The impact of ratio-mismatch and saturation of CTs on the performance of the technique was also examined.","PeriodicalId":177613,"journal":{"name":"Conference Proceedings. IEEE Canadian Conference on Electrical and Computer Engineering (Cat. No.98TH8341)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-05-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116763536","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
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