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IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No. 01TH8565)最新文献

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Field analysis in inhomogeneously-filled stripline circuits 非均匀填充带状线电路中的场分析
IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No. 01TH8565) Pub Date : 2001-10-29 DOI: 10.1109/EPEP.2001.967635
Xing Wang, S. Kabir, J. Weber, S. Dvorak, J. Prince
{"title":"Field analysis in inhomogeneously-filled stripline circuits","authors":"Xing Wang, S. Kabir, J. Weber, S. Dvorak, J. Prince","doi":"10.1109/EPEP.2001.967635","DOIUrl":"https://doi.org/10.1109/EPEP.2001.967635","url":null,"abstract":"The electric field is analyzed in a three-dimensional, inhomogeneously-filled stripline structure. The spectral domain technique is first used to obtain the field expressions in the spectral domain. Analytically performing the two-dimensional inverse Fourier transform results in electric fields that are expressed as closed-form solutions in terms of special functions that are free from any numerical integration. The closed-form solutions permit efficient, accurate full-wave simulations for packaging structures. Computational results for the fields are presented and the physical phenomenology of the fields is studied.","PeriodicalId":174339,"journal":{"name":"IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No. 01TH8565)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-10-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130833812","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Measuring radiation of small electronic equipment in three-dimensional TEM cells 小型电子设备在三维透射电镜室中的辐射测量
IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No. 01TH8565) Pub Date : 2001-10-29 DOI: 10.1109/EPEP.2001.967602
M. Klingler, V. Deniau, S. Egot, B. Démoulin, T. Sarkar
{"title":"Measuring radiation of small electronic equipment in three-dimensional TEM cells","authors":"M. Klingler, V. Deniau, S. Egot, B. Démoulin, T. Sarkar","doi":"10.1109/EPEP.2001.967602","DOIUrl":"https://doi.org/10.1109/EPEP.2001.967602","url":null,"abstract":"Three-dimensional TEM cells are starting to be used for EMC immunity testing and radiation measurements. In the second case, these new test facilities offer the advantage of not having to place the equipment under test in different positions to obtain its total radiated power or its far-field radiation pattern. After a brief overview of the general concept of 3D-TEM cells followed by a summary on radiation measurements in TEM and GTEM cells, the second part of this paper presents the practical application of radiation measurements of off-the-shelf electronic equipment using an industrial prototype of a 6-plate 3D-TEM cell. The results are then compared to reference results obtained of a conventional symmetrical TEM cell. This paper concludes with the repeatability and reproducibility of results obtained and the possibilities of measuring radiation from very small items such as electronic components.","PeriodicalId":174339,"journal":{"name":"IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No. 01TH8565)","volume":"68 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-10-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114574097","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Robust extraction of the frequency-dependent characteristic impedance of transmission lines using one-port TDR measurements 利用单端口TDR测量对传输线频率相关特性阻抗的鲁棒提取
IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No. 01TH8565) Pub Date : 2001-10-29 DOI: 10.1109/EPEP.2001.967624
Woopoung Kim, Seock-Hee Lee, Madhavan Swaminathan, Rao Tummala
{"title":"Robust extraction of the frequency-dependent characteristic impedance of transmission lines using one-port TDR measurements","authors":"Woopoung Kim, Seock-Hee Lee, Madhavan Swaminathan, Rao Tummala","doi":"10.1109/EPEP.2001.967624","DOIUrl":"https://doi.org/10.1109/EPEP.2001.967624","url":null,"abstract":"This paper discusses a method for extracting the frequency dependent characteristic impedance of transmission lines from Time Domain Reflectometry (TDR) measurements using an Open, Short, Load, and Shortline calibration. The frequency dependent behavior of transmission lines was successfully captured using this method. Two types of transmission lines were measured using this method namely, thick metal transmission lines in Printed Wiring Board (PWB) and thin transmission lines in MCM-L technology.","PeriodicalId":174339,"journal":{"name":"IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No. 01TH8565)","volume":"115 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-10-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117167413","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
Flat package inductance extraction with ground plane current precalculation 带地平面电流预计算的平面封装电感提取
IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No. 01TH8565) Pub Date : 2001-10-29 DOI: 10.1109/EPEP.2001.967650
G. Lippens, D. De Zutter
{"title":"Flat package inductance extraction with ground plane current precalculation","authors":"G. Lippens, D. De Zutter","doi":"10.1109/EPEP.2001.967650","DOIUrl":"https://doi.org/10.1109/EPEP.2001.967650","url":null,"abstract":"A method is presented in which a geometry and frequency dependent precalculation of large pin count flat package ground plane currents is made. We use this precalculation to construct an adaptive non-orthogonal PEEC grid for correct modeling of inductance behaviour of RF packages with minimal ground plane discretisations needed.","PeriodicalId":174339,"journal":{"name":"IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No. 01TH8565)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-10-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129579830","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Fast capacitance extraction of conductors embedded in a layered medium 在层状介质中嵌入导体的快速电容提取
IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No. 01TH8565) Pub Date : 2001-10-29 DOI: 10.1109/EPEP.2001.967637
Y.C. Pan, W. Chew
{"title":"Fast capacitance extraction of conductors embedded in a layered medium","authors":"Y.C. Pan, W. Chew","doi":"10.1109/EPEP.2001.967637","DOIUrl":"https://doi.org/10.1109/EPEP.2001.967637","url":null,"abstract":"A new fast multipole method for a stratified medium is presented. The algorithm, which has O(N) computational and memory complexity, can be applied to the general capacitance extraction problem of conductors embedded in a stratified medium.","PeriodicalId":174339,"journal":{"name":"IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No. 01TH8565)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-10-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129979517","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Design optimization methodology for simultaneous bidirectional interface 同时双向界面的设计优化方法
IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No. 01TH8565) Pub Date : 2001-10-29 DOI: 10.1109/EPEP.2001.967667
D. de Araujo, M. Cases, N. Pham
{"title":"Design optimization methodology for simultaneous bidirectional interface","authors":"D. de Araujo, M. Cases, N. Pham","doi":"10.1109/EPEP.2001.967667","DOIUrl":"https://doi.org/10.1109/EPEP.2001.967667","url":null,"abstract":"This paper describes an electrical design optimization methodology for a high-speed point-to-point source-synchronous simultaneous bidirectional interface. These physical links are typically used to interconnect multiple processor subsystems to build symmetric multi-processor (SMP) systems, as well as to connect input/output (I/O) subsystems across relatively long distances. Major design issues such as attenuation, crosstalk, delay skew, impedance control and inter-symbol interference (ISI) are discussed for long and parallel external interconnections.","PeriodicalId":174339,"journal":{"name":"IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No. 01TH8565)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-10-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133581366","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Modeling shared-via decoupling in a multi-layer structure using the CEMPIE approach 使用CEMPIE方法在多层结构中建模共享-通过解耦
IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No. 01TH8565) Pub Date : 2001-10-29 DOI: 10.1109/EPEP.2001.967660
W. Cui, J. Fan, S. Luan, J. Drewniak
{"title":"Modeling shared-via decoupling in a multi-layer structure using the CEMPIE approach","authors":"W. Cui, J. Fan, S. Luan, J. Drewniak","doi":"10.1109/EPEP.2001.967660","DOIUrl":"https://doi.org/10.1109/EPEP.2001.967660","url":null,"abstract":"The CEMPIE approach, a circuit extraction technique based on a mixed-potential integral equation, has been applied to model multi-layer structures including power and signal layers. Power-bus noise mitigation effects due to a decoupling capacitor were studied for several cases with different spacing between the capacitor and an integrated circuit (IC). Modeling results indicate that the capacitor sharing a common via with the IC power/ground pins is superior; viz., it results in the lowest power-bus noise under similar conditions.","PeriodicalId":174339,"journal":{"name":"IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No. 01TH8565)","volume":"123 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-10-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133939015","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A novel efficient approach of including frequency-dependent power delivery effects in bus signal integrity simulation 一种在总线信号完整性仿真中包含频率相关功率传输效应的新颖有效方法
IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No. 01TH8565) Pub Date : 2001-10-29 DOI: 10.1109/EPEP.2001.967669
Weimin Shi, C. Wright
{"title":"A novel efficient approach of including frequency-dependent power delivery effects in bus signal integrity simulation","authors":"Weimin Shi, C. Wright","doi":"10.1109/EPEP.2001.967669","DOIUrl":"https://doi.org/10.1109/EPEP.2001.967669","url":null,"abstract":"As bus speed targets rise and power supply voltages shrink, the traditionally separate procedures of I/O power delivery design and I/O signaling design must be brought together to comprehend the tight interaction between the two domains. The impact of the frequency-dependent, nonideal behavior of the power delivery system upon the I/O signal integrity and timing must be accurately predicted, rather than loosely guardbanded. This paper describes an efficient way of including these effects in the standard signal integrity and timing bus design process without compromising the speed of simulation.","PeriodicalId":174339,"journal":{"name":"IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No. 01TH8565)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-10-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133403796","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
CPW high Q inductors on organic substrates 有机基板上的CPW高Q电感
IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No. 01TH8565) Pub Date : 2001-10-29 DOI: 10.1109/EPEP.2001.967622
S. Dalmia, Seock-Hee Lee, V. Sundaram, S. Min, M. Swaminathan, R. Tummala
{"title":"CPW high Q inductors on organic substrates","authors":"S. Dalmia, Seock-Hee Lee, V. Sundaram, S. Min, M. Swaminathan, R. Tummala","doi":"10.1109/EPEP.2001.967622","DOIUrl":"https://doi.org/10.1109/EPEP.2001.967622","url":null,"abstract":"The development of integrated passive components suitable for integration with printed wiring boards is relatively recent. This integration is required since in most mixed signal designs, off-passive components take up more real estate on the boards than the analog and digital signal processing units. Besides utilizing real estate on board, embedded passives on organic laminates significantly reduce cost and if optimized have less parasitics compared to discrete passive components. This paper discusses the design of high Q coplanar waveguide (CPW) planar inductors on laminates. The reason for choosing a CPW type layout is the ease in adding shunt elements and series elements compared to stripline and microstrip configurations. A max Q factor of 85 at 5.2 GHz was obtained for a 1.85 nH CPW type inductor. Several other inductors with similar performances were studied. The paper also presents a method to model the CPW type inductors. This approach allows designers to include metal-to-dielectric interface roughness, non-uniform signal line profiles and frequency dependent parameters such as the dielectric constant of materials.","PeriodicalId":174339,"journal":{"name":"IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No. 01TH8565)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-10-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121897831","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
Modeling of multi-vias coupling for high speed interconnects 高速互连多通孔耦合建模
IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No. 01TH8565) Pub Date : 2001-10-29 DOI: 10.1109/EPEP.2001.967636
Chung-Chi Huang, L. Tsang, D. Miller, A. Tripathi
{"title":"Modeling of multi-vias coupling for high speed interconnects","authors":"Chung-Chi Huang, L. Tsang, D. Miller, A. Tripathi","doi":"10.1109/EPEP.2001.967636","DOIUrl":"https://doi.org/10.1109/EPEP.2001.967636","url":null,"abstract":"Modeling of multiple via coupling is an important problem in the design of high-speed interconnect systems. It is known that the inter-via coupling has non-negligible effects on the signal integrity of high-speed circuits. In this paper, we investigate first order multi-via coupling based on a two-coupled-vias model. Analytical results are compared with experimental data up to 5GHz. Transient waveforms were obtained for reflection and transmission for trapezoidal and Gaussian input.","PeriodicalId":174339,"journal":{"name":"IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No. 01TH8565)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-10-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129496794","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
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