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Quantum Transport Investigation of Threshold Voltage Variability in Sub-10 nm JunctionlessSi Nanowire FETs 亚10nm无结硅纳米线场效应管阈值电压变化的量子输运研究
2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) Pub Date : 2018-09-01 DOI: 10.1109/SISPAD.2018.8551638
S. Berrada, Jaehyun Lee, H. Carrillo-Nuñez, C. Medina-Bailón, F. Adamu-Lema, V. Georgiev, P. Asenov
{"title":"Quantum Transport Investigation of Threshold Voltage Variability in Sub-10 nm JunctionlessSi Nanowire FETs","authors":"S. Berrada, Jaehyun Lee, H. Carrillo-Nuñez, C. Medina-Bailón, F. Adamu-Lema, V. Georgiev, P. Asenov","doi":"10.1109/SISPAD.2018.8551638","DOIUrl":"https://doi.org/10.1109/SISPAD.2018.8551638","url":null,"abstract":"In this paper, we use the Non-Equilibrium Green's Function formalism to study the dependence of the threshold voltage variability on the cross-section shape and the gate length in Junction Less Field Effect Transistors. Each configuration, i.e. gate length and cross-section, was investigated using a statistical ensemble of 100 samples. We found that the variability in threshold voltage is increased independently of the cross-section shape when the gate length isshrunk down to 5 nm. We attribute this results to the higher wave function “randomization” in longer gate lengths.","PeriodicalId":170070,"journal":{"name":"2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)","volume":"09 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124504819","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
A Stochastic Modeling Framework for NBTI and TDDS in Small Area p-MOSFETs 小面积p- mosfet中NBTI和TDDS的随机建模框架
2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) Pub Date : 2018-09-01 DOI: 10.1109/SISPAD.2018.8551647
R. Anandkrishnan, S. Bhagdikar, N. Choudhury, R. Rao, B. Fernandez, A. Chaudhury, N. Parihar, S. Mahapatra
{"title":"A Stochastic Modeling Framework for NBTI and TDDS in Small Area p-MOSFETs","authors":"R. Anandkrishnan, S. Bhagdikar, N. Choudhury, R. Rao, B. Fernandez, A. Chaudhury, N. Parihar, S. Mahapatra","doi":"10.1109/SISPAD.2018.8551647","DOIUrl":"https://doi.org/10.1109/SISPAD.2018.8551647","url":null,"abstract":"Kinetic Monte Carlo (KMC) simulations are used to simulate the stochastic interface trap generation recovery $(Delta V_{IT})$ and hole trapping detrapping $(Delta V_{HT})$ during and after Negative Bias Temperature Instability (NBTI) stress. The simulated mean of threshold voltage shift $(Delta V_{IT}=Delta V_{HT}+Delta V_{HT})$ is verified against continuum simulations and mean of measured data on multiple small area devices. Simulated and measured time constants for steps of Time Dependent Defect Spectroscopy (TDDS) data and step like recovery after NBTI stress are compared and analyzed. Keywords–NBTI, HKMG, Kinetic Monte Carlo (KMC), interface trap generation, hole trapping, Reaction-Diffusion (RD) model, Non-Radiative Multi-phonon (NMP) model.","PeriodicalId":170070,"journal":{"name":"2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)","volume":"55 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130987531","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Boundary Concepts for an Improvement of the Numerical Solution with regard to the Wigner Transport Equation 改进Wigner输运方程数值解的边界概念
2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) Pub Date : 2018-09-01 DOI: 10.1109/SISPAD.2018.8551736
L. Schulz, D. Schulz
{"title":"Boundary Concepts for an Improvement of the Numerical Solution with regard to the Wigner Transport Equation","authors":"L. Schulz, D. Schulz","doi":"10.1109/SISPAD.2018.8551736","DOIUrl":"https://doi.org/10.1109/SISPAD.2018.8551736","url":null,"abstract":"Even though the numerical solution of the Wigner Transport Equation is linked with problems, the approach is preferable from the engineering point of view. Among the several differences in comparisons based on the numerical solution of the Schrödinger equation, the absence of open boundary conditions may be one of the most prominent challenges. As a consequence unphysical results may be obtained. To overcome the limitations, two concepts are presented allowing an inclusion of open boundary conditions in the Wigner function formalism. The concepts are investigated by means of a simple structured resonant tunneling diode as a prototype device.","PeriodicalId":170070,"journal":{"name":"2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127179111","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Modeling and Finite Element Simulation of Gate Leakage in Cylindrical GAA Nanowire FETs 圆柱形GAA纳米线场效应管栅极泄漏的建模与有限元仿真
2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) Pub Date : 2018-09-01 DOI: 10.1109/SISPAD.2018.8551637
Ashutosh Mahajan, Ravi Solanki, R. Sahoo, R. Patrikar
{"title":"Modeling and Finite Element Simulation of Gate Leakage in Cylindrical GAA Nanowire FETs","authors":"Ashutosh Mahajan, Ravi Solanki, R. Sahoo, R. Patrikar","doi":"10.1109/SISPAD.2018.8551637","DOIUrl":"https://doi.org/10.1109/SISPAD.2018.8551637","url":null,"abstract":"The gate-all-around (GAA) nanowire based devices have generated research interest in recent years for their potential in scaling beyond $10mathrm{n}mathrm{m}$ as they offer excellent control over channel. Reduction in gate oxide thickness and low effective mass channel material for better drive current aid gate leakage which can put limit to further scaling. In this work, we study gate leakage problem for cylindrical nanowire (NW) GAA device and present a model to accurately compute lifetime of the quasi-bound-states (QBS) in inversion region of NW. We study scattering of cylindrical waves by solving Schrodinger equation with open boundary conditions using finite element method (FEM), and thereby calculate gate leakage current for the GAA device. We conduct survey of a broad range of device materials, investigate effect of device dimensions and stress on the gate tunneling leakage. We try to bring out the conditions at which direct tunneling current through the oxide is significant and can possibly exceed the maximum permissible gate current density.","PeriodicalId":170070,"journal":{"name":"2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122557918","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Carrier Lifetime Sensitivity Probe Based on Transient Capacitance: A novel method to Characterize Lifetime in Z2FET 基于瞬态电容的载流子寿命灵敏度探头:一种表征Z2FET寿命的新方法
2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) Pub Date : 2018-09-01 DOI: 10.1109/SISPAD.2018.8551644
F. Adamu-Lema, M. Duan, V. Georgiev, P. Asenov
{"title":"A Carrier Lifetime Sensitivity Probe Based on Transient Capacitance: A novel method to Characterize Lifetime in Z2FET","authors":"F. Adamu-Lema, M. Duan, V. Georgiev, P. Asenov","doi":"10.1109/SISPAD.2018.8551644","DOIUrl":"https://doi.org/10.1109/SISPAD.2018.8551644","url":null,"abstract":"The Z2FET [1] (Fig.1) has a potential for application in memory cells without connection to external charge storage components. Since its invention and experimental demonstrations, essential progress has been made in analyzing its transient and DC properties via electrical characterization [2] and TCAD simulations [3, 4, 6]. However, until now no attempt has been made to investigate the transient capacitance (C-t), which, can be used to characterize the carrier lifetime ruling the dynamic operation of the Z2FET. The carrier lifetime is one of the most important parameters, which directly determines the Z2FET retention time (Fig. 2). In this work, using simulation, we analyze the impact of carrier lifetime on transient capacitance in the gated region of the Z2FET (Fig. 1) in order to provide guidelines of its experimental measurement and characterization.","PeriodicalId":170070,"journal":{"name":"2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)","volume":"50 5","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132792547","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A Deterministic Multi-Subband Boltzmann Transport Equation Solver for GaN Based HEMTs GaN基hemt的确定性多子带玻尔兹曼输运方程求解器
2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) Pub Date : 2018-09-01 DOI: 10.1109/SISPAD.2018.8551696
Suhyeong Cha, Sung-Min Hong
{"title":"A Deterministic Multi-Subband Boltzmann Transport Equation Solver for GaN Based HEMTs","authors":"Suhyeong Cha, Sung-Min Hong","doi":"10.1109/SISPAD.2018.8551696","DOIUrl":"https://doi.org/10.1109/SISPAD.2018.8551696","url":null,"abstract":"A high electron mobility transistor based on a GaN channel is simulated by using a deterministic Boltzmann transport equation solver. In order to verify the physical soundness of the scattering mechanisms, first, a mobility calculator has been implemented. Phonon-limited electron mobility is calculated for one-dimensional heterostructure in the low field regime. For GaN based HEMTs, the two-dimensional Poisson equation and the one-dimensional Schrodinger equation along the confinement direction are considered. The transport of electrons in the non-equilibrium state is determined by solving the Boltzmann equation expanded with the Fourier harmonics in a self-consistent manner. The polar optical phonon is considered to explain the scattering of the system and the Pauli principle is also included. The Boltzmann equation is implemented for the total energy space with H-transformation. Without assistance from the momentum-based equation, the direct bias ramping from the equilibrium solution can be performed.","PeriodicalId":170070,"journal":{"name":"2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132930735","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Steady-State Empirical Model for Electrical Activation of Silicon-Implanted Gallium Nitride 硅注入氮化镓电活化的稳态经验模型
2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) Pub Date : 2018-09-01 DOI: 10.1109/SISPAD.2018.8551728
A. Toifl, S. Selberherr, V. Šimonka, J. Weinbub, A. Hössinger
{"title":"Steady-State Empirical Model for Electrical Activation of Silicon-Implanted Gallium Nitride","authors":"A. Toifl, S. Selberherr, V. Šimonka, J. Weinbub, A. Hössinger","doi":"10.1109/SISPAD.2018.8551728","DOIUrl":"https://doi.org/10.1109/SISPAD.2018.8551728","url":null,"abstract":"We propose a steady-state empirical activation model for the prediction of the electrical activation efficiency of silicon-implanted gallium nitride. Our model has been implemented into Silvaco’s Victory Process simulator which we utilize to perform an accurate prediction of the dopant activation profiles. The dopant activation strongly influences the device characteristics, which is demonstrated by device simulations of a state-of-the-art junction barrier Schottky rectifier. Our results show that increasing the annealing temperature by fifty degrees Celsius reduces the device’s on-state resistance by one order of magnitude.","PeriodicalId":170070,"journal":{"name":"2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)","volume":"47 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121203400","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Technique for Asymmetric Source/Drain Resistance Extraction on a Single Gate Length MOSFET 单栅长MOSFET非对称源漏电阻提取技术
2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) Pub Date : 2018-09-01 DOI: 10.1109/SISPAD.2018.8551676
P. Oldiges, Chen Zhang, Xin He Miao, M. Kang, T. Yamashita
{"title":"Technique for Asymmetric Source/Drain Resistance Extraction on a Single Gate Length MOSFET","authors":"P. Oldiges, Chen Zhang, Xin He Miao, M. Kang, T. Yamashita","doi":"10.1109/SISPAD.2018.8551676","DOIUrl":"https://doi.org/10.1109/SISPAD.2018.8551676","url":null,"abstract":"A simple inline measurement technique for extracting the individual resistance components of the source, drain, and channel on a single MOSFET device using DC measurements is proposed. Modeling data is used to prove the efficacy of the technique. This method can be applied to symmetric or asymmetric devices.","PeriodicalId":170070,"journal":{"name":"2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121424182","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Topography Simulation of 4H-SiC-Chemical-Vapor-Deposition Trench Filling Including an OrientationDependent Surface Free Energy 含取向相关表面自由能的4h - sic化学气相沉积海沟填充形貌模拟
2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) Pub Date : 2018-09-01 DOI: 10.1109/SISPAD.2018.8551735
K. Mochizuki, Ji Shiyang, R. Kosugi, Y. Yonezawa, H. Okumura
{"title":"Topography Simulation of 4H-SiC-Chemical-Vapor-Deposition Trench Filling Including an OrientationDependent Surface Free Energy","authors":"K. Mochizuki, Ji Shiyang, R. Kosugi, Y. Yonezawa, H. Okumura","doi":"10.1109/SISPAD.2018.8551735","DOIUrl":"https://doi.org/10.1109/SISPAD.2018.8551735","url":null,"abstract":"Topography simulation of chemical-vapordeposition (CVD) trench filling has been advanced as a tool for designing fabrication processes of high-voltage 4H-SiC superjunction devices. In the longitudinal section of filled stripe trenches, an experimentally observed dip, which had not been well reproduced with a previous technique using a fixed surface free energy $gamma$, came to be qualitatively reproduced by including an orientation dependence of $gamma$.","PeriodicalId":170070,"journal":{"name":"2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)","volume":"07 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122372334","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Interplay of RDF and Gate LER Induced Statistical Variability in Negative Capacitance FETs 负电容场效应管中RDF和栅极LER诱导的统计变异的相互作用
2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) Pub Date : 2018-09-01 DOI: 10.1109/SISPAD.2018.8551747
T. Dutta, V. Georgiev, A. Asenov
{"title":"Interplay of RDF and Gate LER Induced Statistical Variability in Negative Capacitance FETs","authors":"T. Dutta, V. Georgiev, A. Asenov","doi":"10.1109/SISPAD.2018.8551747","DOIUrl":"https://doi.org/10.1109/SISPAD.2018.8551747","url":null,"abstract":"We investigate the impact on statistical variability induced by random dopant fluctuations (RDF) and gate line edge roughness (LER) acting separately and simultaneously in negative capacitance (NC) FETs. In order to simulate the NCFETs, we couple the 3D transistor simulator tool GARAND which is well suited for statistical variability simulations, with the Landau Khalatnikov (L-K) model of the ferroelectric. We also explore the impact of ferroelectric thickness scaling.","PeriodicalId":170070,"journal":{"name":"2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122330162","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
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