P. Oldiges, Chen Zhang, Xin He Miao, M. Kang, T. Yamashita
{"title":"单栅长MOSFET非对称源漏电阻提取技术","authors":"P. Oldiges, Chen Zhang, Xin He Miao, M. Kang, T. Yamashita","doi":"10.1109/SISPAD.2018.8551676","DOIUrl":null,"url":null,"abstract":"A simple inline measurement technique for extracting the individual resistance components of the source, drain, and channel on a single MOSFET device using DC measurements is proposed. Modeling data is used to prove the efficacy of the technique. This method can be applied to symmetric or asymmetric devices.","PeriodicalId":170070,"journal":{"name":"2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Technique for Asymmetric Source/Drain Resistance Extraction on a Single Gate Length MOSFET\",\"authors\":\"P. Oldiges, Chen Zhang, Xin He Miao, M. Kang, T. Yamashita\",\"doi\":\"10.1109/SISPAD.2018.8551676\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A simple inline measurement technique for extracting the individual resistance components of the source, drain, and channel on a single MOSFET device using DC measurements is proposed. Modeling data is used to prove the efficacy of the technique. This method can be applied to symmetric or asymmetric devices.\",\"PeriodicalId\":170070,\"journal\":{\"name\":\"2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)\",\"volume\":\"7 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SISPAD.2018.8551676\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SISPAD.2018.8551676","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Technique for Asymmetric Source/Drain Resistance Extraction on a Single Gate Length MOSFET
A simple inline measurement technique for extracting the individual resistance components of the source, drain, and channel on a single MOSFET device using DC measurements is proposed. Modeling data is used to prove the efficacy of the technique. This method can be applied to symmetric or asymmetric devices.