Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451)最新文献_第7页

Microarchitecture evaluation with physical planning 微架构评估与物理规划

Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451) Pub Date : 2003-06-02 DOI: 10.1145/775832.775843

J. Cong, Ashok Jagannathan, Glenn D. Reinman, Michail Romesis

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引用次数: 59

Clock-tree power optimization based on RTL clock-gating 基于RTL时钟门控的时钟树功率优化

Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451) Pub Date : 2003-06-02 DOI: 10.1145/775832.775989

M. Donno, Alessandro Ivaldi, L. Benini, E. Macii

引用次数: 125

Verification strategy for integration 3G baseband SoC 集成3G基带SoC的验证策略

Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451) Pub Date : 2003-06-02 DOI: 10.1145/775832.775835

Y. Mathys, André Chátelain

{"title":"Verification strategy for integration 3G baseband SoC","authors":"Y. Mathys, André Chátelain","doi":"10.1145/775832.775835","DOIUrl":"https://doi.org/10.1145/775832.775835","url":null,"abstract":"The verification strategy of the second generation Motorola baseband chip for the 3G wireless phone market is presented. The next generation of wireless phones supports multiple wireless protocols, high data bandwidth and a full range of multi-media applications running on an open OS. The baseband chip provides the integrated processing platform for such terminals. Baseband chips are among the most complex System-on-Chip (SoC) of this industry. The verification strategy to integrate such highly complex SoC is multi-fold and adaptive; hierarchical across the different abstraction levels with special emphasis on verification corners related to the abstraction level. The SoC architecture validation and optimization step should occur early-on in the design cycle but require high level modeling methodology to capture the complete hardware and mission critical use cases and deliver quantitative data on the architecture. Adaptive verification scenarios are discussed across the abstraction level and the SoC hierarchy, from stand-alone IP verification, through sub platforms and to the SoC level. A collection of metrics are presented and illustrate the efforts required to verify such complex SoC. We conclude with proposals and opportunities to enhance the SoC verification strategies based on the lessons learned.","PeriodicalId":167477,"journal":{"name":"Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-06-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131051731","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 15

Libraries: LifeJacket or Straitjacket 图书馆:救生衣还是紧身衣

Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451) Pub Date : 2003-06-02 DOI: 10.1145/775832.775994

C. Sechen, B. Chappel, Jim Hogan, A. Moore, Tadahiko Nakamura, G. Northrop, A. Thakar

引用次数: 10

Test cost reduction for SOCs using TAMs and Lagrange multipliers 使用TAMs和拉格朗日乘法器降低soc的测试成本

Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451) Pub Date : 2003-06-02 DOI: 10.1145/775832.776021

Anuja Sehgal, V. Iyengar, M. Krasniewski, K. Chakrabarty

引用次数: 18

Statistical estimation of leakage-induced power grid voltage drop considering within-die process variations 考虑模内工艺变化的漏致电网电压降的统计估计

Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451) Pub Date : 2003-06-02 DOI: 10.1145/775832.776047

I. A. Ferzli, F. Najm

引用次数: 29

Design techniques for sensor appliances: foundations and light compass case study 传感器设备的设计技术:基础和轻罗盘案例研究

Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451) Pub Date : 2003-06-02 DOI: 10.1145/775832.775851

J. Wong, S. Megerian, M. Potkonjak

引用次数: 15

A transformation based algorithm for reversible logic synthesis 一种基于变换的可逆逻辑综合算法

Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451) Pub Date : 2003-06-02 DOI: 10.1145/775832.775915

D. M. Miller, D. Maslov, Gerhard, Dueck

引用次数: 542

Automatic communication refinement for system level design 用于系统级设计的自动通信细化

Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451) Pub Date : 2003-06-02 DOI: 10.1145/775832.775911

S. Abdi, Dongwan Shin, D. Gajski

引用次数: 42

Using a formal specification and a model checker to monitor and direct simulation 使用正式的规范和模型检查器来监视和指导模拟

Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451) Pub Date : 2003-06-02 DOI: 10.1145/775832.775926

S. Tasiran, Yuan Yu, Brannon Batson

引用次数: 22