C. Sechen, B. Chappel, Jim Hogan, A. Moore, Tadahiko Nakamura, G. Northrop, A. Thakar
{"title":"图书馆:救生衣还是紧身衣","authors":"C. Sechen, B. Chappel, Jim Hogan, A. Moore, Tadahiko Nakamura, G. Northrop, A. Thakar","doi":"10.1145/775832.775994","DOIUrl":null,"url":null,"abstract":"With the advent of nanotechnologies, the so-called “productivity gap” between the number of transistors we can design and the hundreds of millions we can physically place on a chip is growing. Not only is the complexity increasing in the macrocosm of SoCs and system-level design, it is also exploding at the microcosmic level of wires, transistors and shapes. Time-tomarket, first-time-right and high-performance pressures worsen the situation.","PeriodicalId":167477,"journal":{"name":"Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-06-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":"{\"title\":\"Libraries: LifeJacket or Straitjacket\",\"authors\":\"C. Sechen, B. Chappel, Jim Hogan, A. Moore, Tadahiko Nakamura, G. Northrop, A. Thakar\",\"doi\":\"10.1145/775832.775994\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"With the advent of nanotechnologies, the so-called “productivity gap” between the number of transistors we can design and the hundreds of millions we can physically place on a chip is growing. Not only is the complexity increasing in the macrocosm of SoCs and system-level design, it is also exploding at the microcosmic level of wires, transistors and shapes. Time-tomarket, first-time-right and high-performance pressures worsen the situation.\",\"PeriodicalId\":167477,\"journal\":{\"name\":\"Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451)\",\"volume\":\"16 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2003-06-02\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"10\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1145/775832.775994\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/775832.775994","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
With the advent of nanotechnologies, the so-called “productivity gap” between the number of transistors we can design and the hundreds of millions we can physically place on a chip is growing. Not only is the complexity increasing in the macrocosm of SoCs and system-level design, it is also exploding at the microcosmic level of wires, transistors and shapes. Time-tomarket, first-time-right and high-performance pressures worsen the situation.
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