1996 Proceedings 46th Electronic Components and Technology Conference最新文献_第3页

Optical fiber interconnections 光纤互连

1996 Proceedings 46th Electronic Components and Technology Conference Pub Date : 1996-05-28 DOI: 10.1109/ECTC.1996.517436

M. Shahid, R.A. Roil

引用次数: 2

Thermal modeling of a few-chip module housing a DC-DC power supply 采用DC-DC电源的小芯片模块的热建模

1996 Proceedings 46th Electronic Components and Technology Conference Pub Date : 1996-05-28 DOI: 10.1109/ECTC.1996.550509

D. Walshak, H. Hashemi, P. Mehrotra

引用次数: 0

Gigabyte/s data communications with the POLO parallel optical link 千兆字节/秒数据通信与POLO并行光链路

1996 Proceedings 46th Electronic Components and Technology Conference Pub Date : 1996-05-28 DOI: 10.1109/ECTC.1996.517406

K. H. Hahn, K.S. Giboney, R. E. Wilson, J. Straznicky, E. Wong, M. Tan, R. Kaneshiro, D. Dolfi, E. H. Mueller, A. Plotts, D. D. Murray, J. Marchegiano, B. Booth, B. Sano, B. Madhaven, B. Raghavan, A. Levi

引用次数: 59

ESD qualification and testing of semiconductor electronic components 半导体电子元件的ESD鉴定和测试

1996 Proceedings 46th Electronic Components and Technology Conference Pub Date : 1996-05-28 DOI: 10.1109/ECTC.1996.517457

V. Gross, S. Voldman, W. Guthrie

引用次数: 2

Modeling and analysis of interconnects within a package incorporating vias and a perforated ground plane 包含过孔和穿孔接平面的封装内互连的建模和分析

1996 Proceedings 46th Electronic Components and Technology Conference Pub Date : 1996-05-28 DOI: 10.1109/ECTC.1996.550513

A. Mathis, A. Peterson

{"title":"Modeling and analysis of interconnects within a package incorporating vias and a perforated ground plane","authors":"A. Mathis, A. Peterson","doi":"10.1109/ECTC.1996.550513","DOIUrl":"https://doi.org/10.1109/ECTC.1996.550513","url":null,"abstract":"Frequently multichip modules (MCM) have perforated ground and power planes as opposed to solid ground and power planes. The periodic apertures in the planes alter how electromagnetic waves propagate in the system, and therefore must be taken into account when analyzing the system. The characteristic behavior of interconnects above a perforated ground plane is affected by the size, shape, and orientation of the apertures. To accurately model the interconnects over perforated ground planes requires the use of the periodic 3D Green's function. The Green's functions comprises two infinite series both of which converge extremely slowly, and this slow convergence of the periodic Green's function has hampered previous analysis. To overcome this obstacle a mixed domain representation of the Green's function based on the error function transformation is used. This representation of the Green's function converges exponentially in both the spatial and spectral domains. Using this representation, the Green's function can be computed accurately and in a short amount of time. Modeling the gridded ground plane is just the first step in modeling an entire system. In addition to being able to accurately model the ground plane, one must be able to model a wide variety of structures, such as multiple interconnects, discontinuities, and conformal vias. All of these models need to be verified with measurements of actual devices. Finally, in order to be effective in post-layout verification, the developed models must interface with a circuit simulator.","PeriodicalId":143519,"journal":{"name":"1996 Proceedings 46th Electronic Components and Technology Conference","volume":"170 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-05-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130003129","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Delamination cracking in encapsulated flip chips 封装倒装芯片的分层开裂

1996 Proceedings 46th Electronic Components and Technology Conference Pub Date : 1996-05-28 DOI: 10.1109/ECTC.1996.517422

C. Le Gall, J. Qu, D. McDowell

{"title":"Delamination cracking in encapsulated flip chips","authors":"C. Le Gall, J. Qu, D. McDowell","doi":"10.1109/ECTC.1996.517422","DOIUrl":"https://doi.org/10.1109/ECTC.1996.517422","url":null,"abstract":"In this paper, finite element analyses of delamination in flip chip assemblies are described. The objectives of this study were to investigate delamination at the encapsulant/chip interface along the thickness of the chip under thermal loading, and to determine the potential for interconnection failures resulting from this type of delamination. Under operating conditions, the mismatch in thermal expansion between the silicon chip of a flip chip assembly and an organic substrate subjects the solder joints to extremely large strains, which may result in premature failure of the solder connections. Although underfill encapsulation can reduce the strains in the solder joints, it results in the potential for cracking at the chip-underfill-substrate interfaces during temperature cycling. Due to the CTE mismatch, a strong interfacial shear stress concentration develops near the free edge; when this stress exceeds the bonding strength between the encapsulant and the silicon, an interface crack will initiate, may further propagate toward the encapsulated corner of the chip, and then continue along the active face of the chip. Once this adhesion is lost, the solder joints are subjected directly to the strain resulting from the CTE mismatch, and are likely to crack under thermal cycling conditions. In the model, a crack was introduced along the chip edge/encapsulant interface. The crack tip driving force was studied for chips of different sizes. The finite element method was used in the analyses in conjunction with the theory of interfacial fracture mechanics.","PeriodicalId":143519,"journal":{"name":"1996 Proceedings 46th Electronic Components and Technology Conference","volume":"91 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-05-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129026352","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 35

A new leadframe design solution for improved pop-corn cracking performance 一种新的引线框架设计解决方案，可改善爆米花裂解性能

1996 Proceedings 46th Electronic Components and Technology Conference Pub Date : 1996-05-28 DOI: 10.1109/ECTC.1996.517378

C. Lee, Won Chin, H. Pape

{"title":"A new leadframe design solution for improved pop-corn cracking performance","authors":"C. Lee, Won Chin, H. Pape","doi":"10.1109/ECTC.1996.517378","DOIUrl":"https://doi.org/10.1109/ECTC.1996.517378","url":null,"abstract":"The transition from through-hole packages to plastic surface mount packages has witnessed the emergence of pop-corn cracking phenomenon. Despite recent improvements in packaging materials, package designs and manufacturing technologies, the pop-corn problem is still widespread throughout the semiconductor industry. This paper reports the findings of a new leadframe design as one of the synergistic factors towards improving pop-corn performance of plastic packages. The test package was a 28/spl times/28/spl times/2.4 mm moisture sensitive 144L Quad Flat Pack (QFP) employing copper-alloy as a leadframe material. The effect of plasma cleaning on the new leadframe design was investigated for improved pop-corn performance. An atomic force microscope (AFM) and contact angle method were used to characterise surfaces of leadframe and chip backside in the uncleaned acid plasma cleaned surfaces. Finite element analysis revealed that stresses in the die-attach layer can be significantly reduced by up to 70% in the new leadframe design. Compared to standard leadframe design, package measurements showed that the warpage values were 47% lower in packages assembled with the new leadframe design. Thermal performance of package was characterised by thermal resistance (O/sub JA/) measurements. The measured O/sub JA/ was similar for both standard and new leadframe designs at about 31 K/W for large chip size (12/spl times/12 mm/sup 2/). Decreasing the chip size to 8/spl times/8 mm/sup 2/ has the effect of increasing O/sub JA/ by 8% to 35 K/W for standard designs and 36% to 42 K/W for new leadframe designs. Furthermore, results showed that delamination at the interface of die-pad/moulding compound and chip backside/moulding compound after temperature cycling, pressure cooker and AE3 test were substantially reduced and/or prevented. More importantly, by simply substituting the standard leadframe design with the new leadframe design, packages can achieve IPC level 3 moisture sensitive classification with or without plasma cleaning.","PeriodicalId":143519,"journal":{"name":"1996 Proceedings 46th Electronic Components and Technology Conference","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-05-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125653719","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 14

3-dimensional memory module 三维存储器模块

1996 Proceedings 46th Electronic Components and Technology Conference Pub Date : 1996-05-28 DOI: 10.1109/ECTC.1996.517381

N. Takahashi, N. Senba, Y. Shimada, I. Morizaki, K. Tokuno

引用次数: 6

Package switching noise evaluation using boundary scan circuitry 用边界扫描电路评价封装开关噪声

1996 Proceedings 46th Electronic Components and Technology Conference Pub Date : 1996-05-28 DOI: 10.1109/ECTC.1996.517466

E. Games, U. Shrivastava, J. Liao

引用次数: 0

Effect of polyimide processing on multichip glass ceramic module fabrications 聚酰亚胺工艺对多芯片玻璃陶瓷模组制作的影响

1996 Proceedings 46th Electronic Components and Technology Conference Pub Date : 1996-05-28 DOI: 10.1109/ECTC.1996.550807

D. Shih

{"title":"Effect of polyimide processing on multichip glass ceramic module fabrications","authors":"D. Shih","doi":"10.1109/ECTC.1996.550807","DOIUrl":"https://doi.org/10.1109/ECTC.1996.550807","url":null,"abstract":"This paper discusses the yield analysis of the thin film wiring layers fabricated on the 127 mm multichip glass ceramic modules (MCM-D), currently used on the IBM Enterprise System/9000/sup TM/ family of computer processors. To select a suitable polyimide (PI) for the thin film wiring layer, modules were fabricated with either the BTDA-APB or the PMDA-ODA polyimide. By keeping all other processing parameters and structures the same, the wiring layers fabricated with the PMDA-ODA polyimide exhibited significantly better yield than those made of the BTDA-APB PI. The yield loss in the modules fabricated with the BTDA-APB PI occurred during thermal processing, where some of the transmission lines fabricated atop the PI were found cracked. Further investigations indicate that, during lift-off processing, the presence of a small contaminant, such as a fiber, metal flake, a particle, or polishing scratches can expose the PI to the hot N-methylpyrollidinone (NMP) solvent. Depending on the polyimide used for thin film processing, the diffusion and swelling of the PI by the low molecular weight organic solvent can potentially produce significant damage to the polyimide/Cu wiring structure and the consequent yield loss of the modules due to line opens. The magnitude of the damage was found to depend on the rate of solvent diffusion, process temperature, lift-off time and the amount of PI swelling during processing.","PeriodicalId":143519,"journal":{"name":"1996 Proceedings 46th Electronic Components and Technology Conference","volume":"63 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-05-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131302859","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1