International Journal of Circuit Theory and Applications最新文献

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Efficient Input-Output Feedback Linearizing Control of BLDC Drives 无刷直流驱动器的高效输入输出反馈线性化控制
IF 1.6 3区 工程技术
International Journal of Circuit Theory and Applications Pub Date : 2024-12-22 DOI: 10.1002/cta.4408
Dhaval Joshi, Dipankar Deb, Ashutosh K. Giri, Ilhami Colak
{"title":"Efficient Input-Output Feedback Linearizing Control of BLDC Drives","authors":"Dhaval Joshi,&nbsp;Dipankar Deb,&nbsp;Ashutosh K. Giri,&nbsp;Ilhami Colak","doi":"10.1002/cta.4408","DOIUrl":"https://doi.org/10.1002/cta.4408","url":null,"abstract":"<div>\u0000 \u0000 <p>Electrically driven unmanned aerial vehicles (UAVs) are gaining popularity due to use in industrial, military, and civil applications. The UAVs have to execute complicated maneuvers in the air requires accurate control of the BLDC motor propeller systems. In this study, we propose easy to implement field-oriented adaptive input-output feedback linearizing control (AIOFL) for controlling propellers as per demand of flight controller. This study aims to compare the proposed field-oriented AIOFL with usual six step control architecture with a focus on the typical back-electromotive force (back-EMF) shapes featured in the propeller motor. The proposed control architecture that does not only regulate speed and torque of the propeller with acceptable torque ripple but it also estimates the rotor magnetic flux and the stator resistance of the BLDC motor to know about stator/rotor condition monitoring, motor fault detection, and temperature rise. To ensure reliable operation in all operational conditions, closed loop stability of proposed speed controller is analyzed based on the Lyapunov method. Particle swarm optimization (PSO) is utilized to accurately tune the PI controller since the trial-and-error technique used to choose the PI controller gains resulted in the low stability and poor transient response of the controller. Finally, comprehensive numerical and experimental tests are performed and compared with conventional field-oriented control to evaluate the effectiveness and robustness of the proposed control system.</p>\u0000 </div>","PeriodicalId":13874,"journal":{"name":"International Journal of Circuit Theory and Applications","volume":"53 9","pages":"5441-5456"},"PeriodicalIF":1.6,"publicationDate":"2024-12-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145013195","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Study of a Dual-Loop Digital Control System for High-Power Input-Parallel Output-Series Phase-Shifted Full-Bridge Converters Based on Pole Configuration 基于极点配置的大功率输入并联输出串联相移全桥变换器双环数字控制系统研究
IF 1.6 3区 工程技术
International Journal of Circuit Theory and Applications Pub Date : 2024-12-22 DOI: 10.1002/cta.4406
Zhipeng Yu, Yang Zhao
{"title":"Study of a Dual-Loop Digital Control System for High-Power Input-Parallel Output-Series Phase-Shifted Full-Bridge Converters Based on Pole Configuration","authors":"Zhipeng Yu,&nbsp;Yang Zhao","doi":"10.1002/cta.4406","DOIUrl":"https://doi.org/10.1002/cta.4406","url":null,"abstract":"<div>\u0000 \u0000 <p>Digital control is characterized by mature analysis technology and easy implementation and is widely used in high-power input-parallel-output series (IPOS) phase-shifted full-bridge (PSFB) converters. However, in modern industrial applications, most digital controllers are still designed with traditional technologies, such as PID control. Some characteristics of this control technology, such as control time delay and approximate design process, make the results fail to achieve the expected performance. At the same time, this digital control needs to be tested in the process of use, and the process is cumbersome and difficult to achieve. Based on the existing problems, this paper deduces a discrete state space model from the application of the IPOS-PSFB converter, focusing on the characteristics of control delay. At the same time, this paper puts forward a double-loop control strategy to ensure the accuracy of controller design. Among them, the current and voltage loop designs are independent. The current loop and voltage loop adopts two controllers, namely, the proportional controller and PI plus state feedback controller, and the parameters of the voltage loop controller are accurately calculated according to overshoot and bandwidth index. Finally, the IPOS-PSFB converter is simulated and analyzed by MATLAB/Simulink software, and the controller's steady-state performance and anti-interference are analyzed.</p>\u0000 </div>","PeriodicalId":13874,"journal":{"name":"International Journal of Circuit Theory and Applications","volume":"53 9","pages":"5288-5304"},"PeriodicalIF":1.6,"publicationDate":"2024-12-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145013196","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A q-Z Source-Based Modified Bidirectional Three-Port Converter for Battery-Assisted Solar PV Applications 一种基于q-Z源的改进双向三端口转换器用于电池辅助太阳能光伏应用
IF 1.6 3区 工程技术
International Journal of Circuit Theory and Applications Pub Date : 2024-12-22 DOI: 10.1002/cta.4405
Indrojeet Chakraborty, Sreejith S, Sovit Kumar Pradhan
{"title":"A q-Z Source-Based Modified Bidirectional Three-Port Converter for Battery-Assisted Solar PV Applications","authors":"Indrojeet Chakraborty,&nbsp;Sreejith S,&nbsp;Sovit Kumar Pradhan","doi":"10.1002/cta.4405","DOIUrl":"https://doi.org/10.1002/cta.4405","url":null,"abstract":"<div>\u0000 \u0000 <p>In this paper, two separate q-Z source-based three-port converters (TPC) with modified bidirectional networks (BDNs) that offer significant voltage gain for photovoltaic (PV)-battery applications are proposed. Both designs allow the converter operation to be carried out in four different modes where the power from primary source can flow to the battery as well as the load and the battery alone can also feed power to the load, at lower duty cycle. The designs are based on a q-Z source converter and use a modified bidirectional path to accommodate the battery port. The main advantage of using one of the two proposed topology is that it provides a common ground for the primary source input (PV), the bidirectional energy storage port, and the output port. In addition to the above mentioned four modes of operation, in the proposed topology, an external switch can be used to charge the battery from the PV source in the absence of the load as well. On the basis of these two distinct advantages, one of the two designs is analyzed in detail. A noncomplex control algorithm is designed to facilitate the battery operation depending upon load power requirement. There are two different duty ratios to control the operation of five MOSFETs to regulate the output voltage. In addition, the converter offers suitable features such as low voltage stress (V\u0000<span></span><math>\u0000 <msub>\u0000 <mrow></mrow>\u0000 <mrow>\u0000 <mi>s</mi>\u0000 <mi>t</mi>\u0000 <mi>r</mi>\u0000 <mi>e</mi>\u0000 <mi>s</mi>\u0000 <mi>s</mi>\u0000 </mrow>\u0000 </msub></math>) across devices, continuous input current, and common ground (comm.g.) for all three ports, to be used for renewable energy source (RES) applications. The validation of the analytical analysis of the converter is done in a Matlab simulink environment, and the results are presented. For validating the performance of the proposed converter, a 250-V, 450-W prototype is implemented and tested at 10 kHz. The converter in stand-alone mode can attain an efficiency of around 94.5%.</p>\u0000 </div>","PeriodicalId":13874,"journal":{"name":"International Journal of Circuit Theory and Applications","volume":"53 9","pages":"5314-5337"},"PeriodicalIF":1.6,"publicationDate":"2024-12-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145013163","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Dynamic Modeling of LLC Resonant Converter Using Extracted Two-Harmonic Approximation and Comparative Analysis With Other Approaches 基于提取双谐波逼近的LLC谐振变换器动力学建模及与其它方法的比较分析
IF 1.6 3区 工程技术
International Journal of Circuit Theory and Applications Pub Date : 2024-12-22 DOI: 10.1002/cta.4395
Ahmad Abbasi, Abbas Ghayebloo
{"title":"Dynamic Modeling of LLC Resonant Converter Using Extracted Two-Harmonic Approximation and Comparative Analysis With Other Approaches","authors":"Ahmad Abbasi,&nbsp;Abbas Ghayebloo","doi":"10.1002/cta.4395","DOIUrl":"https://doi.org/10.1002/cta.4395","url":null,"abstract":"<div>\u0000 \u0000 <p>Resonant converters are widely used in various applications due to their wide input voltage range, high efficiency, and high power density. The mathematical modeling of these converters has great importance because they have both AC and DC states, simultaneously, which poses challenges for controller design. In this paper, a dynamic mathematical model of the LLC resonant converter is extracted by developing the common first harmonic approximation (FHA) model to a two-harmonic approximation (THA) model, and its accuracy is compared with other conventional models, including the FHA, the dynamic pharos (DP), non-linear mathematical models. As a reference model, circuit experimental model has been used for comparison. The comparison metric is the sum of squared errors in transient and steady-state modes, expressed as a percentage of the steady-state peak value. Furthermore, the output of the mathematical models and simulations is evaluated against practical results from a prototype.</p>\u0000 </div>","PeriodicalId":13874,"journal":{"name":"International Journal of Circuit Theory and Applications","volume":"53 9","pages":"5457-5466"},"PeriodicalIF":1.6,"publicationDate":"2024-12-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145013164","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A 0.41- μW Self-Biased Temperature and Offset-Compensated Fully Differential Instrumentation Amplifier With 47 mdB/°C Thermal Sensitivity and 425 pVolt/°C Offset Drift 一种0.41 μW自偏置温度补偿全差分仪表放大器,具有47 mdB/°C的热敏度和425 pVolt/°C的偏置漂移
IF 1.6 3区 工程技术
International Journal of Circuit Theory and Applications Pub Date : 2024-12-19 DOI: 10.1002/cta.4397
Koyel Mukherjee, Rajat Kumar Pal, Soumya Pandit
{"title":"A 0.41-\u0000\u0000 μW Self-Biased Temperature and Offset-Compensated Fully Differential Instrumentation Amplifier With 47 mdB/°C Thermal Sensitivity and 425 pVolt/°C Offset Drift","authors":"Koyel Mukherjee,&nbsp;Rajat Kumar Pal,&nbsp;Soumya Pandit","doi":"10.1002/cta.4397","DOIUrl":"https://doi.org/10.1002/cta.4397","url":null,"abstract":"<div>\u0000 \u0000 <p>A low-power self-biased single operational transconductance amplifier (OTA)-based temperature and offset compensated fully differential instrumentation amplifier (FDIA) is proposed in this article. The design of the FDIA circuit, mainly for low-frequency applications like wearable bio-medical instruments, is carried out in SCL 0.18-\u0000<span></span><math>\u0000 <mi>μ</mi></math>m standard CMOS technology. The circuit operates under 0.6V supply voltage. The 43.8dB differential gain of the FDIA demonstrates a maximum variation of 47 mdB/°C for temperature ranging between \u0000<span></span><math>\u0000 <mo>−</mo>\u0000 <mn>15</mn></math>°C and +48°C with signal-bandwidth ranging from 0.5 to 1.02 kHz. It also shows a moderately high common mode rejection ratio (CMRR) of \u0000<span></span><math>\u0000 <mo>≈</mo></math> 100 dB. A simple offset-compensation arrangement lowers the offset voltage to only 13 nV which drifts maximum by 425 pV/°C. Operation under sub-1 V supply voltage, nano-ampere bias currents, and weak inversion mode of operations of the transistors has effectively restricted the power consumption of the proposed FDIA circuit to less than 500 nW. An optimized layout design of the proposed circuit results in a total silicon area of 0.014 mm\u0000<span></span><math>\u0000 <msup>\u0000 <mrow></mrow>\u0000 <mrow>\u0000 <mn>2</mn>\u0000 </mrow>\u0000 </msup></math>.</p>\u0000 </div>","PeriodicalId":13874,"journal":{"name":"International Journal of Circuit Theory and Applications","volume":"53 9","pages":"5061-5075"},"PeriodicalIF":1.6,"publicationDate":"2024-12-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145013036","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Virtual Voltage Vector Modulated Model Predictive Control of Modular Multilevel Converters 模块化多电平变换器的虚电压矢量调制模型预测控制
IF 1.6 3区 工程技术
International Journal of Circuit Theory and Applications Pub Date : 2024-12-19 DOI: 10.1002/cta.4402
Jingang Han, Zhaoju Ding, Lamin F. Ceesay, Gang Yao, Frédéric Charpentier, Mohamed Benbouzid, Tianhao Tang
{"title":"A Virtual Voltage Vector Modulated Model Predictive Control of Modular Multilevel Converters","authors":"Jingang Han,&nbsp;Zhaoju Ding,&nbsp;Lamin F. Ceesay,&nbsp;Gang Yao,&nbsp;Frédéric Charpentier,&nbsp;Mohamed Benbouzid,&nbsp;Tianhao Tang","doi":"10.1002/cta.4402","DOIUrl":"https://doi.org/10.1002/cta.4402","url":null,"abstract":"<div>\u0000 \u0000 <p>The model predictive control (MPC) method is widely applied in modular multilevel converter (MMC) control due to its multiple-object inclusion and fast response. But there still some challenges that exist such as high computational burden caused by the large number of submodule (SM), weighting factors tuning for various control object in the cost function and requirement of short sampling times. To solve these challenges, a virtual voltage vector modulated model predictive control (VSVV-M2PC) scheme for the control of the MMC is proposed. This scheme enables the MMC to output dual voltage levels, which improves the current tracking accuracy. Additional circulating current suppression (CCS) method and sorting-based modulator are designed, which reduce the computational burden, achieve fixed switching frequency, and avoid the weighting factor tuning process. Finally, the proposed scheme is validated by experimental results.</p>\u0000 </div>","PeriodicalId":13874,"journal":{"name":"International Journal of Circuit Theory and Applications","volume":"53 9","pages":"5275-5287"},"PeriodicalIF":1.6,"publicationDate":"2024-12-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145013037","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Low-Loss Differential SPST Switch With Filtering Response and Common-Mode Suppression 具有滤波响应和共模抑制的低损耗差分SPST开关
IF 1.6 3区 工程技术
International Journal of Circuit Theory and Applications Pub Date : 2024-12-19 DOI: 10.1002/cta.4412
Shipeng Zhao, Zhongbao Wang, Hongmei Liu, Mingming Gao, Shaojun Fang
{"title":"Low-Loss Differential SPST Switch With Filtering Response and Common-Mode Suppression","authors":"Shipeng Zhao,&nbsp;Zhongbao Wang,&nbsp;Hongmei Liu,&nbsp;Mingming Gao,&nbsp;Shaojun Fang","doi":"10.1002/cta.4412","DOIUrl":"https://doi.org/10.1002/cta.4412","url":null,"abstract":"<div>\u0000 \u0000 <p>In this paper, a novel low-loss differential switch with filtering response and common-mode (CM) suppression is proposed for RF communication system. The single-pole single-throw (SPST) switch toggles ON and OFF states of the switch by controlling the voltage to PIN diodes loaded on the feeding transmission slotline. Microstrip-to-slotline transition provides intrinsic CM suppression for differential switch. The frequency selectivity is achieved by using modified dumb-belled slotline resonator, and the design process of its resonant operating mechanism is provided. The fabricated and measured differential SPST switch prototype exhibits bandpass filtering response with low insertion loss under the ON state. For the OFF state of the differential SPST switch, it can demonstrate wideband rejection characteristics. More importantly, CM noises can be effectively suppressed in this design.</p>\u0000 </div>","PeriodicalId":13874,"journal":{"name":"International Journal of Circuit Theory and Applications","volume":"53 9","pages":"5054-5060"},"PeriodicalIF":1.6,"publicationDate":"2024-12-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145013035","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
An Enhanced Power Sharing Scheme With Voltage Unbalance and Distortion Compensation in an Islanded AC Microgrid Using CSF-MPC 基于CSF-MPC的孤岛交流微电网电压不平衡和失真补偿的功率共享方案
IF 1.6 3区 工程技术
International Journal of Circuit Theory and Applications Pub Date : 2024-12-18 DOI: 10.1002/cta.4392
Ranjith Kumar Uppuluri, Rajasekharareddy Chilipi, Mahmadasraf A. Mulla
{"title":"An Enhanced Power Sharing Scheme With Voltage Unbalance and Distortion Compensation in an Islanded AC Microgrid Using CSF-MPC","authors":"Ranjith Kumar Uppuluri,&nbsp;Rajasekharareddy Chilipi,&nbsp;Mahmadasraf A. Mulla","doi":"10.1002/cta.4392","DOIUrl":"https://doi.org/10.1002/cta.4392","url":null,"abstract":"<div>\u0000 \u0000 <p>This paper presents an enhanced power sharing scheme (EPSS) for parallelly connected distributed generators (DGs) in an islanded microgrid (MG) using a constant switching frequency-model predictive control (CSF-MPC). Unlike conventional droop control, wherein only accurate real power sharing among DGs is possible, the EPSS enables accurate sharing of reactive and harmonic powers even under mismatched line impedances. Additionally, the voltage unbalance and distortion at the point of common coupling (PCC) are mitigated. The EPSS is implemented using a reference voltage that consists of (1) the fundamental droop control; (2) the virtual impedance control; (3) the unbalance compensation control; and (4) the harmonic compensation control. The performance of the EPSS is tested on a MG consisting of two DGs of both similar and dissimilar capacities under a step changes in loads. The EPSS is implemented using CSF-MPC, which offers superior performance compared with conventional proportional plus integral and proportional resonant controllers. The simulation and hardware-in-loop results confirm the effectiveness of the EPSS in addressing power sharing issues and mitigating both distortion and unbalance of PCC voltage.</p>\u0000 </div>","PeriodicalId":13874,"journal":{"name":"International Journal of Circuit Theory and Applications","volume":"53 9","pages":"5422-5440"},"PeriodicalIF":1.6,"publicationDate":"2024-12-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145012778","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Synchronous Buck Converter With a Wide Input Voltage Range Using Simulated Peak Current Mode Control 采用模拟峰值电流模式控制的宽输入电压范围同步降压变换器
IF 1.6 3区 工程技术
International Journal of Circuit Theory and Applications Pub Date : 2024-12-18 DOI: 10.1002/cta.4410
Wei Zou, Zili Xiong, Zhengwang Cheng, Li Zhang, Mei Wang, Xinguo Ma, Chuyun Huang, Xuecheng Zou
{"title":"A Synchronous Buck Converter With a Wide Input Voltage Range Using Simulated Peak Current Mode Control","authors":"Wei Zou,&nbsp;Zili Xiong,&nbsp;Zhengwang Cheng,&nbsp;Li Zhang,&nbsp;Mei Wang,&nbsp;Xinguo Ma,&nbsp;Chuyun Huang,&nbsp;Xuecheng Zou","doi":"10.1002/cta.4410","DOIUrl":"https://doi.org/10.1002/cta.4410","url":null,"abstract":"<div>\u0000 \u0000 <p>With the rapid development of automotive infotainment, industrial DC-DC motors and telecom servers, the demand for buck converters with high-input or wide-input voltage is increased. This paper proposes a synchronous buck converter with a wide input voltage range, utilizing a simulated peak current mode. The proposed simulated peak current control mode removes the need for a separate slope compensation circuit. By integrating a slope compensation current directly into the ramp generator, it eliminates subharmonic oscillation issues when the duty cycle in current mode control exceeds 50%, thereby simplifying circuit design. The proposed simulated peak current mode retains the key advantages of peak current mode, such as feedforward control, easy overcurrent protection, and easy loop compensation, while significantly enhancing the loop's immunity to interference. This enhancement reduces the noise sensitivity of the pulse width modulation circuit, eliminates false switch turn-offs caused by leading-edge spikes, and removes the need for external low-pass filters. Furthermore, with the integration of high-voltage regulation technology, it achieves a wide input–output range, broadening its application scope. As a result, the proposed mode is more robust and reliable in applications with high stability and anti-interference requirements, such as automotive infotainment, industrial DC–DC motors, and telecom servers, offering strong support for reliable and precise power system performance. The proposed converter is implemented using UMC 250 nm BCD technology and operated at a frequency range of 50 kHz–1 MHz, with the maximum output current up to 7 A, a wide input voltage range of 6–100 V, and an output voltage range of 1.215–80 V. Besides, excellent minimum ripple/output ratio (0.0325%) and maximum power efficiency (90.93%) are achieved.</p>\u0000 </div>","PeriodicalId":13874,"journal":{"name":"International Journal of Circuit Theory and Applications","volume":"53 9","pages":"4995-5006"},"PeriodicalIF":1.6,"publicationDate":"2024-12-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145012780","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Novel High-Speed Ultralow Power Double-Node-Upsets Tolerant Automotive Latch Design 一种新型高速、超低功耗双节点容扰锁闩设计
IF 1.6 3区 工程技术
International Journal of Circuit Theory and Applications Pub Date : 2024-12-16 DOI: 10.1002/cta.4401
Guoji Qiu, Dawei Bi, Zhiyuan Hu, Zhengxuan Zhang
{"title":"A Novel High-Speed Ultralow Power Double-Node-Upsets Tolerant Automotive Latch Design","authors":"Guoji Qiu,&nbsp;Dawei Bi,&nbsp;Zhiyuan Hu,&nbsp;Zhengxuan Zhang","doi":"10.1002/cta.4401","DOIUrl":"https://doi.org/10.1002/cta.4401","url":null,"abstract":"<div>\u0000 \u0000 <p>This paper introduces a novel High-speed Ultralow power Double-Node Upsets (DNU) Tolerant Automotive Latch (HUDTAL) fabricated in the 55-nm CMOS technology. Through the integration of Muller-C-Element (MCE), Node-Hardened MCE, CLK-Gating MCE (CG-MCE), and Transmission Gate techniques, the proposed latch can fully resist DNU. Compared with similar types of latches through simulation, the proposed latch has higher critical charges and does not generate any TFs at the output that may affect the next stage circuit, saving 4.89% area power delay product on average. Additionally, it exhibits lower sensitivity to process voltage temperature variations, enabling stable operation in harsh environmental conditions.</p>\u0000 </div>","PeriodicalId":13874,"journal":{"name":"International Journal of Circuit Theory and Applications","volume":"53 9","pages":"5498-5506"},"PeriodicalIF":1.6,"publicationDate":"2024-12-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145012760","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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