International Journal of Circuit Theory and Applications最新文献_第8页

A novel arc-shaped magnetic coupler with dual-channel receiver for rotational misalignment tolerance in AUV underwater wireless power transfer systems 带双通道接收器的新型弧形磁耦合器，用于 AUV 水下无线电力传输系统中的旋转偏差容限

IF 1.8 3区工程技术

International Journal of Circuit Theory and Applications Pub Date : 2024-08-04 DOI: 10.1002/cta.4222

Hongmin Tang, Zhiwei Shen, Ronghuan Xie, Wenbin Pan, Xiaoying Chen, Zhongqi Li, Yiming Zhang

引用次数: 0

Research on linear active disturbance rejection control strategy based on grid-forming inverters 基于并网逆变器的线性有源干扰抑制控制策略研究

IF 1.8 3区工程技术

International Journal of Circuit Theory and Applications Pub Date : 2024-08-01 DOI: 10.1002/cta.4186

Meng Jie Hu, Yu Tang

{"title":"Research on linear active disturbance rejection control strategy based on grid-forming inverters","authors":"Meng Jie Hu, Yu Tang","doi":"10.1002/cta.4186","DOIUrl":"10.1002/cta.4186","url":null,"abstract":"Grid-forming inverters play a vital role in connecting renewable energy sources to the grid, and maintaining stable output voltage is essential for system operation. However, traditional dual-PI voltage–current loop control suffers from slow response and weak disturbance rejection, leading to suboptimal control performance of grid-connected inverter output voltage. Moreover, employing traditional dual-PI control in grid-connected inverters results in low output impedance, making them prone to subsynchronous oscillations and instability under strong grid conditions. To address these challenges, this study introduces a novel dual-loop control strategy based on linear active disturbance rejection control (LADRC), wherein voltage loop is regulated by LADRC while current loop employs PI control. Quantitative analysis and experimental findings demonstrate that compared with traditional dual-PI voltage–current loop control, the LADRC-based dual-loop control strategy offers higher bandwidth and lower steady-state error, thereby enhancing the tracking speed and precision of grid-forming inverter output voltage. The LADRC-based dual-loop control strategy reduces output impedance in grid-forming inverter systems, lowering THD of output voltage and improving harmonic suppression under nonlinear loads. Experimental results show its robustness against strong grid conditions compared with traditional dual-PI control, ensuring stable output voltage.","PeriodicalId":13874,"journal":{"name":"International Journal of Circuit Theory and Applications","volume":"53 4","pages":"2340-2361"},"PeriodicalIF":1.8,"publicationDate":"2024-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141885372","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Low noise, temperature-compensated, electrochemical cell sigma–delta current measurement readout circuit 低噪音、温度补偿型电化学电池 sigma-delta 电流测量读出电路

IF 1.8 3区工程技术

International Journal of Circuit Theory and Applications Pub Date : 2024-08-01 DOI: 10.1002/cta.4163

Pegah Tahani, Mehdi Habibi, Sebastian Magierowski

{"title":"Low noise, temperature-compensated, electrochemical cell sigma–delta current measurement readout circuit","authors":"Pegah Tahani, Mehdi Habibi, Sebastian Magierowski","doi":"10.1002/cta.4163","DOIUrl":"10.1002/cta.4163","url":null,"abstract":"<div>\u0000 \u0000 Nanopore ion channels are a promising solution for certain molecular structure analyses. Large arrays of nanopore channels and their associated readout circuits are used in many molecular studies such as DNA sequencing. Readout circuits must meet challenging performance criteria such as low noise operation, low power consumption, in-channel digitization capability, and high linearity. Previously, sigma–delta modulators have been presented to address these criteria; however, their specifications show drifts with temperature. In this paper, an approach is presented to keep modulator performance constant with temperature variations. For this purpose, the sigma–delta modulator's feedforward and feedback branches are modified so that their gain coefficient remains constant over a certain temperature range. With large sensors arrays, solutions employing high bias currents in the feedback paths are not suitable due to power consumption limitations. Here, the design gives the possibility of switching low current levels in the feedback paths without affecting the ENOB. The proposed temperature compensation solution shows good performance when temperature is swept from 27°C to 100°C. Over the mentioned temperature range, the gain and bandwidth of the modulator show a change of less than 0.4%. It is further shown that for a 10 kHz input current signal with an amplitude of 600 pA, the ENOB and power consumption are 12.9 and 4.6 mW, respectively.\u0000 </div>","PeriodicalId":13874,"journal":{"name":"International Journal of Circuit Theory and Applications","volume":"53 3","pages":"1234-1252"},"PeriodicalIF":1.8,"publicationDate":"2024-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141885374","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A low stress, high voltage, switched capacitor and active switched inductor DC-DC converter 低应力、高电压、开关电容器和有源开关电感器 DC-DC 转换器

IF 1.8 3区工程技术

International Journal of Circuit Theory and Applications Pub Date : 2024-07-31 DOI: 10.1002/cta.4190

Motiur Reza, Avneet Kumar, Pan Xuewei

{"title":"A low stress, high voltage, switched capacitor and active switched inductor DC-DC converter","authors":"Motiur Reza, Avneet Kumar, Pan Xuewei","doi":"10.1002/cta.4190","DOIUrl":"10.1002/cta.4190","url":null,"abstract":"<div>\u0000 \u0000 A novel, high voltage gain, non-isolated, non-coupled DC-DC converter is proposed for applications such as PV systems, HEV, aerospace, and so forth. The proposed converter consists of two active switches in parallel, which are turned on and off simultaneously, two inductors in parallel and switched capacitors arrangements. During charging, both the inductor comes in parallel with voltage source and effectively reduces the ripple current and inductor size. These factors attribute to the lower power loss and low cost. The voltage stress of the switches is at least 5 times lower than the output voltage, which allows the use of low \u0000<math>\u0000 <mstyle>\u0000 <msub>\u0000 <mrow>\u0000 <mi>R</mi>\u0000 </mrow>\u0000 <mrow>\u0000 <mi>dson</mi>\u0000 </mrow>\u0000 </msub>\u0000 </mstyle></math> switches. The voltage stresses of the diodes are also at least 2.5 times lower than the output voltage, which enables to use low forward voltage drop diodes, and hence, the total power loss due to diode will be further reduced. Lower capacitors' stress also results in reduced parasitics. The detailed steady-state analysis of the proposed converter and its comparison with the existing converters are presented. The efficiency of the proposed converter is highest. The hardware prototype of 325 W is implemented to boost the voltage by 18 times, and results are presented. The closed-loop analysis of the proposed converter is also carried out. The maximum efficiency of the proposed converter is reported 96% for 100 W and 93% for 300 W.\u0000 </div>","PeriodicalId":13874,"journal":{"name":"International Journal of Circuit Theory and Applications","volume":"53 4","pages":"1975-1999"},"PeriodicalIF":1.8,"publicationDate":"2024-07-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141885373","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

An improved pixel circuit with low noise event rate and enhanced bright-light sensitivity for dynamic vision sensor 用于动态视觉传感器的改进型像素电路，具有低噪声事件发生率和更高的亮光灵敏度

IF 1.8 3区工程技术

International Journal of Circuit Theory and Applications Pub Date : 2024-07-30 DOI: 10.1002/cta.4203

Zhiyuan Gao, Ding Zhang, Xiaopei Shi, Yanghao He, Jiangtao Xu

{"title":"An improved pixel circuit with low noise event rate and enhanced bright-light sensitivity for dynamic vision sensor","authors":"Zhiyuan Gao, Ding Zhang, Xiaopei Shi, Yanghao He, Jiangtao Xu","doi":"10.1002/cta.4203","DOIUrl":"10.1002/cta.4203","url":null,"abstract":"Dynamic vision sensor (DVS) imaging quality is significantly affected by pixel noise and temporal contrast (TC), which is inversely proportional to sensitivity. To reduce the noise event rate and improve sensitivity in bright-light conditions in the DVS pixel circuit, this paper proposes improvements to the conventional DVS pixel circuit. The proposed DVS pixel circuit adopts stacked medium-threshold transistors instead of a single high-threshold transistor in the photoreceptor and introduces a threshold switching circuit. Compared with the conventional DVS pixel circuit, this design increases event threshold normalized by root mean square (RMS) noise voltage, reducing the dim-light noise bandwidth. Additionally, it achieves higher sensitivity in bright-light conditions compared with dim-light conditions. The proposed DVS pixel circuit is implemented in a 110-nm complementary metal-oxide semiconductor (CMOS) process. Post-simulation results show that, for photocurrents between 5 fA and 100 pA, the proposed DVS pixel circuit achieves a 35 Hz peak event rate at 15% TC, which is reduced to 3.1% of the conventional structure. For photocurrents exceeding 30 pA, the proposed structure can switch TC from 15% to 5%, maintaining a noise event rate below 0.1 Hz.","PeriodicalId":13874,"journal":{"name":"International Journal of Circuit Theory and Applications","volume":"53 4","pages":"1833-1847"},"PeriodicalIF":1.8,"publicationDate":"2024-07-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141871544","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Inverse Class-E power amplifier with broadband capability at different switch-off duty ratio 不同关断占空比下具有宽带能力的反 E 类功率放大器

IF 1.8 3区工程技术

International Journal of Circuit Theory and Applications Pub Date : 2024-07-30 DOI: 10.1002/cta.4184

Akram Sheikhi, Hossein Hemesi, Andrei Grebennikov

{"title":"Inverse Class-E power amplifier with broadband capability at different switch-off duty ratio","authors":"Akram Sheikhi, Hossein Hemesi, Andrei Grebennikov","doi":"10.1002/cta.4184","DOIUrl":"10.1002/cta.4184","url":null,"abstract":"The paper explores the investigation of an inverse Class-E amplifier featuring a series output filter across various switch-off duty ratios D. Analysis of different duty ratios as a design parameter reveals their impact on peak switch voltage, output power capability, and maximum operating frequency. Notably, it is demonstrated that adjusting the D ratio affects these parameters, with specific emphasis on achieving a maximum normalized switch voltage lower than 2 and an output power capability exceeding 0.1 for D = 0.7. Furthermore, the paper considers both parasitic shunt capacitance and series inductor in the load network, a departure from previous works that solely focused on the series inductor. The proposed circuit is highlighted for its ease of implementation compared with conventional reactance compensation circuits employing parallel resonant circuits, which are challenging to form directly. An innovative approach is introduced to showcase the broadband performance of the inverse Class-E amplifier. The measured drain efficiency and output power versus input power at 430 MHz are 82% and 45.3 dBm, respectively. A similar performance can be achieved within the frequency range of 380–600 MHz by proper tuning at saturated power. The measurement results demonstrate a maximum high power-added efficiency (PAE) of 79% and drain efficiency of 82% within this frequency range, accompanied by a gain exceeding 12.0 dB and output power surpassing 44 dBm.","PeriodicalId":13874,"journal":{"name":"International Journal of Circuit Theory and Applications","volume":"53 4","pages":"1820-1832"},"PeriodicalIF":1.8,"publicationDate":"2024-07-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141871545","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A novel wide-range voltage gain bidirectional DC-DC converter for electric vehicles 用于电动汽车的新型宽范围电压增益双向 DC-DC 转换器

IF 1.8 3区工程技术

International Journal of Circuit Theory and Applications Pub Date : 2024-07-30 DOI: 10.1002/cta.4191

Ziqiang Wen, Faqiang Wang

引用次数: 0

A novel seven-level inverter with high gain and reducing spike current capabilities 具有高增益和降低尖峰电流能力的新型七电平逆变器

IF 1.8 3区工程技术

International Journal of Circuit Theory and Applications Pub Date : 2024-07-30 DOI: 10.1002/cta.4200

Ravi Anand, Rajib Kumar Mandal, Ankita Choudhary

引用次数: 0

Detuning analysis and power tracking of dual-ended resonant circuit based on improved variable-step perturbation observation for wireless power transfer system 基于改进型变步扰动观测的双端谐振电路的解谐分析和功率跟踪，用于无线电力传输系统

IF 1.8 3区工程技术

International Journal of Circuit Theory and Applications Pub Date : 2024-07-30 DOI: 10.1002/cta.4204

Jiangui Li, Guangbin Luo, Longyang Wang, Qinghe Si, Yinchong Peng, Zheyuan Guo

{"title":"Detuning analysis and power tracking of dual-ended resonant circuit based on improved variable-step perturbation observation for wireless power transfer system","authors":"Jiangui Li, Guangbin Luo, Longyang Wang, Qinghe Si, Yinchong Peng, Zheyuan Guo","doi":"10.1002/cta.4204","DOIUrl":"10.1002/cta.4204","url":null,"abstract":"A power tracking method based on improved variable-step perturbation observation approach has been proposed in this paper. This method is aimed at addressing the detuning issues caused by capacitor parameter drift in MCR-WPT systems based on S-S compensation circuits. Compared with traditional tuning methods, the proposed method has fast response, high accuracy, low complexity, and less prone to over-tracking. Firstly, a mathematical model of the system based on the detuning factor has been established. Secondly, the impact of different detuning conditions on the system at the initial resonant frequency has been studied. Thirdly, the response characteristics of the system to different frequencies under different detuning conditions have been studied. Fourthly, based on the above researches, an improved variable-step perturbation observation method based on the single-step power drop factor has been proposed. Finally, an experimental platform was constructed, and relevant experiments were conducted. Experimental results validate the effectiveness of power tracking under different detuning conditions, with the lowest transmission efficiency being 81.51%.","PeriodicalId":13874,"journal":{"name":"International Journal of Circuit Theory and Applications","volume":"53 4","pages":"1848-1865"},"PeriodicalIF":1.8,"publicationDate":"2024-07-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141871548","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

High-throughput in-memory bitwise computing based on a coupled dual-SRAM array with independent operands 基于具有独立操作数的耦合双 SRAM 阵列的高吞吐量内存内位运算

IF 1.8 3区工程技术

International Journal of Circuit Theory and Applications Pub Date : 2024-07-29 DOI: 10.1002/cta.4192

Hongbiao Wu, Zhiting Lin, Xiulong Wu, Qiang Zhao, Wenjuan Lu, Chunyu Peng

引用次数: 0